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PDF MA818 Data sheet ( Hoja de datos )

Número de pieza MA818
Descripción 3 Phase / Pulse Width Modulation Waveform Generator
Fabricantes GEC Plessey Semiconductors 
Logotipo GEC Plessey Semiconductors Logotipo



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MA818 pdf
MA818
PWM SWITCHING
INSTANTS
11
TRIANGLE WAVE AT
CARRIER FREQUENCY,
SAMPLING ON 1VE AND 2VE PEAKS
0 POWER WAVEFORM
AS READ FROM
EXTERNAL
PROM/EPROM
21
11
RESULTING
PWM
WAVEFORM
0
21
Fig. 3 Asynchronous PWM generation with‘double-edged’ regular sampling as used by the MA818
t1
ALE
RD
t2
WR
t8
CS
AD0-AD7
t10
t15
LATCH ADDRESS
t3
t9
t4
t11
t12
LATCH DATA
Fig. 4 Intel bus timing definitions
Parameter
Symbol Min. Units
ALE high period
t1 70 ns
Delay time, ALE to WR
t2 40 ns
WR low period
t3 200 ns
Delay time,WR high to ALE high t4
40 ns
CS setup time
t8 20 ns
CS hold time
t9 0 ns
Address setup time
t10 30 ns
Address hold time
t15 30 ns
Data setup time
t11 100 ns
Data hold time
t12 30 ns
Table 1 Intel bus timings at VDD = 5V, TAMB = 125°C
t1
AS
t2
DS
R/W
t8
CS
t3
t6
t4
t5
t7
t9
AD0-AD7
t10
t11
t15
LATCH ADDRESS
t12
LATCH DATA
Fig. 5 Motorola bus timing definitions
Parameter
Symbol Min. Units
AS high period
t1 90 ns
Delay time, as low to DS high
t2
40 ns
DS high period
t3 210 ns
Delay time, DS low to AS high
t4
40 ns
DS low period
t5 200 ns
DS high to R/W low setup time t6
10 ns
R/W hold time
t7 10 ns
CS setup time
t8 20 ns
CS hold time
t9 0 ns
Address setup time
t10 30 ns
Address hold time
t15 30 ns
Write data setup time
t11 110 ns
Write data hold time
t12 30 ns
Table 2 Motorola bus timings at VDD = 5V, TAMB = 125°C
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5 Page





MA818 arduino
MA818
HARDWARE INPUT/OUTPUT FUNCTIONS
Set Output Trip (SET TRIP input)
The SET TRIP input is provided separately from the micro-
processor interface in order to allow an external source to
override the microprocessor and provide a rapid shutdown
facility. For example, logic signals from overcurrent sensing
circuitry or the microprocessor ‘watchdog’ might be used to
activate this input.
When the SET TRIP input is taken to a logic high, the output
trip latch is activated. This results in the TRIP output and the six
PWM outputs being latched low immediately. This condition can
only be cleared by applying a reset cycle to the RST input.
Because of the asynchronous nature of the SET TRIP input,
it is important that when not in use it is tied low and isolated from
potential sources of noise. On no account should this input be left
floating.
Output Trip Status (TRIP output)
The TRIP output indicates the status of the output trip latch
and is active low.
Reset (RST input)
The RST input performs the following functions when activbe
(low):
1. All PWM outputs are forced low (if not already low) thereby
turning off the drive switches.
2. All internal counters are reset to zero (this corresponds to 0°
for the red phase output).
3. The rising edge of RST reactivates the PWM outputs resetting
the output trip and setting the TRIP output high –
assuming that the SET TRIP input is inactive (i.e. Iow).
Zero Phase Pulse (ZPP output)
The ZPP output provides pulses at the same frequency as the
power frequency with a 1 : 2 mark-space ratio. When in the
forward mode of operation the falling edge of ZPP corresponds
to 0° for the red phase PWM output. In the reverse mode, the
rising edge of ZPP corresponds to 0° for the red phase PWM
output.
Clock (CLK input)
The CLK input provides a timing reference used by the
MA818 for all timings related to the PWM outputs. The
microprocessor interface, however, derives all its timings from
the microprocessor and therefore the microprocessor and the
MA818 may be run either from the same or from different clocks.
PWM WAVEFORM ASSIGNMENT
The waveform amplitude data used to construct the PWM
output sequences is read by the MA818 from an external 2K38
PROM/EPROM. The use of an external PROM/EPROM allows
the user to define the exact waveform required.
Waveform Definition
Good waveform resolution is achieved by storing 768 8-bit
amplitude samples representing the positive 180° span of the
waveform. It is assumed that the data is symmetrical about the
90° axis.
The MA818 constructs the full 360° waveform by assigning
negative values to the same samples for the second half of the
cycle. It uses these samples to calculate the three instantaneous
amplitudes for all three phases. The 768 8- bit samples are
linearly spaced over the 0° to 180° span, giving an angular
resolution of approximately 0·23°
Waveform segment
Sample number
0°- 60°
0 - 255
60·23°- 120°
256 - 511
120·23°- 179·77°
512 - 767
Table 8 180° of the 360° cycle is divided into 768 8-bit samples
255
VALUE
OF
8-BIT
SAMPLE
POWER
WAVEFORM
0
0° 90° 180°
PHASE (768-BIT RESOLUTION)
Fig. 18 180° sample of typical power waveform
WAVEFORM STORAGE
An industry standard 2K38 PROM or EPROM (2716 or 27C16)
is required for waveform storage. As less than half the memory
capacity of the PROM/EPROM is needed to store the waveform,
this is used to advantage in order to minimise the pin count of the
MA818. Each 8-bit data word representing a sample of the
waveform is stored as two 4-bit nibbles in the least significant
nibble position of the 8-bit PROM/EPROM locations. Hence the
most significant nibble is unused (and may therefore be left
unprogrammed) so only 4 data lines (D0 - D3) are required.
The 768 waveform samples are therefore stored as 1546
four-bit samples. Fig. 19 illustrates the method used for mapping
the data into the PROM/EPROM. The least signiflcant nibbles
are stored sequentially from location 0H to 300H, and the most
significantnibblesarestoredfrom400H to700H.TheMA818reads
Ihe data by accessing the two 4-bit nibbles (using A10 to select
the high and low nibble memory areas) and then concatenates
them internally to form the 8-bit waveform sample byte.
The reading of data from the the PROM/EPROM is per-
formed automatically by the MA818 without microprocessor
intervention whenever the PWM generation is active.
800H
700H
NOT
USED
M.S.
NIBBLES
400H
300H
L.S.
NIBBLES
0000H
D7
D3 D0
Fig. 19 Waveform PROM/EPROM memory map
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