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PDF HY514400B Data sheet ( Hoja de datos )
| Número de pieza | HY514400B | |
| Descripción | 1M x 4-Bit CMOS DRAM | |
| Fabricantes | Hynix Semiconductor | |
| Logotipo |  |
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HY514400B
1Mx4, Fast Page mode
DESCRIPTION
This family is a 4M bit dynamic RAM organized 1,048,576 x 4-bit configuration with Extended Data Out mode CMOS
DRAMs. Extended data out mode is a kind of page mode which is useful for the read operation. The circuit and process
design allow this device to achieve high performance and low power dissipation. Optional features are access time(50, 60
or 70ns) and package type(SOJ or TSOP-II) and power consumption (Normal or Low power with self refresh). Hyundai’s
advanced circuit design and process technology allow this device to achieve high bandwidth, low power consumption and
high reliability.
FEATURES
Ÿ Fast Page Mode operation
Ÿ Read-modify-write Capability
Ÿ TTL compatible inputs and outputs
Ÿ /CAS-before-/RAS, /RAS-only, Hidden and
Self refresh capability
Ÿ Max. Active power dissipation
Speed
50
60
70
Power
550mW
495mW
440mW
Ÿ Refresh cycle
Part number
HY514400B
Refresh
1K
Normal
16ms
SL-part
128ms
Ÿ JEDEC standard pinout
Ÿ 20/26-pin SOJ (300mil)
20/26-pin TSOP-II (300mil)
Ÿ Single power supply of 5V ± 10%
Ÿ Early Write or output enable controlled write
Ÿ Fast access time and cycle time
Speed
50
60
70
tRAC
50ns
60ns
70ns
tCAC
15ns
15ns
20ns
tPC
35ns
40ns
45ns
ORDERING INFORMATION
Part Name
HY514400BJ
HY514400BLJ
HY514400BSLJ
HY514400BT
HY514400BLT
HY514400BSLT
*SL : Low power with self refresh
Refresh
1K
1K
1K
1K
1K
1K
Power
L-part
SL-part
L-part
SL-part
Package
20/26Pin SOJ
20/26Pin SOJ
20/26Pin SOJ
20/26Pin TSOP-II
20/26Pin TSOP-II
20/26Pin TSOP-II
This document is a general product description and is subject to change without notice. Hyundai electronics does not assume any responsibility for use of
circuits described. No patent licences are implied
Rev.00 / Sep.97
1
Hyundai Semiconductor
1 page  
HY514400B
DC CHARACTERISTICS
(TA = 0°C to 70°C , VCC = 5V ± 10%, VSS = 0V, unless otherwise noted.)
Symbol
Parameter
Test condition
ICC1 Operating Current
/RAS, /CAS Cycling
tRC = tRC(min)
ICC2 TTL Standby
Current
/RAS, /CAS ≥ VIH(min)
Other inputs ≥ VSS
ICC3 /RAS-only Refresh
Current
/RAS Cycling,/CAS = VIH
tRC = tRC(min)
ICC4
Fast Page mode Current
/CAS Cycling, /RAS = VIL
tHPC = tHPC(min)
ICC5 CMOS Standby
Current
/RAS = /CAS ≥ VCC - 0.2V
ICC6 /CAS-before-/RAS
Refresh Current
/RAS & /CAS = 0.2V
tRC = tRC(min.)
ICC7 Battery Back-up
Current (SL-part)
tRC=125µs
/CAS = CBR cycling or 0.2V
/OE & /WE = VCC - 0.2V
Address = Vcc-0.2V or 0.2V
DQ0~DQ3 = Vcc-0.2, 0.2V or Open
ICC8
Self Refresh Current
/RAS & /CAS = 0.2V
(SL-part)
Other pins are same as ICC7
Speed
50
60
70
50
60
70
50
60
70
SL-part
50
60
70
Max.
100
90
80
2
100
90
80
70
60
50
1
200
100
90
80
300
Unit
mA
mA
mA
mA
mA
µA
mA
µA
200 µA
Note
1. ICC1, ICC3, ICC4 and ICC6 depend on output loading and cycle rates(tRC and tPC).
2. Specified values are obtained with output unloaded.
3. ICC is specified as an average current. In ICC1, ICC3, ICC6, address can be changed only once while /RAS=VIL. In ICC4,
address can be changed maximum once while /CAS=VIH within one cycle time tPC.
4. Only tRAS(max) = 1µs is applied to refresh of battery backup but tRAS(max) = 10µs is to applied to normal functional
operation.
5. Icc5(max.), Icc7 and Icc8 are applied to SL-part only.
1Mx4,FP DRAM
Rev.10 / Jan.97
5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet HY514400B.PDF ] | |
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