MBM29DL400BC Datasheet PDF - Fujitsu Media Devices
| Part Number | MBM29DL400BC | |
| Description | 4M (512K X 8/256K X 16) BIT | |
| Manufacturers | Fujitsu Media Devices | |
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There is a preview and MBM29DL400BC download ( pdf file ) link at the bottom of this page. Total 30 Pages | ||
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FUJITSU SEMICONDUCTOR
DATA SHEET
DS05-20866-2E
FLASH MEMORY
CMOS
4M (512K × 8/256K × 16) BIT
MBM29DL400TC-55/-70/-90/-12/MBM29DL400BC-55/-70/-90/-12
s FEATURES
• Single 3.0 V read, program, and erase
Minimizes system level power requirements
• Simultaneous operations
Read-while-Erase or Read-while-Program
• Compatible with JEDEC-standard commands
Uses same software commands as E2PROMs
• Compatible with JEDEC-standard world-wide pinouts (Pin compatible with MBM29LV400TC/BC)
48-pin TSOP(I) (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type)
• Minimum 100,000 program/erase cycles
• High performance
55 ns maximum access time
• Sector erase architecture
Two 16K byte, four 8K bytes, two 32K byte, and six 64K bytes.
Any combination of sectors can be concurrently erased. Also supports full chip erase.
• Boot Code Sector Architecture
T = Top sector
B = Bottom sector
• Embedded EraseTM Algorithms
Automatically pre-programs and erases the chip or any sector
• Embedded ProgramTM Algorithms
Automatically writes and verifies data at specified address
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion
• Ready/Busy output (RY/BY)
Hardware method for detection of program or erase cycle completion
• Automatic sleep mode
When addresses remain stable, automatically switch themselves to low power mode.
• Low VCC write inhibit ≤ 2.5 V
• Erase Suspend/Resume
Suspends the erase operation to allow a read in another sector within the same device
(Continued)
Embedded EraseTM and Embedded ProgramTM are trademarks of Advanced Micro Devices, Inc.
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MBM29DL400TC-55/-70/-90/-12/MBM29DL400BC-55/-70/-90/-12
s PRODUCT LINE UP
Part No.
Ordering Part No.
VCC = 3.3 V
+0.3 V
–0.3 V
VCC = 3.0 V
+0.6 V
–0.3 V
Max. Address Access Time (ns)
Max. CE Access Time (ns)
Max. OE Access Time (ns)
s BLOCK DIAGRAM
MBM29DL400TC/MBM29DL400BC
-55 -70
—
—
— — -90 -12
55 70 90 120
55 70 90 120
30 30 35 50
V CC
V SS
A0 to A17
(A-1)
Bank 2 Address
RESET
WE
CE
OE
BYTE
DQ 0 to DQ 15
State
Control
Command
Register
RY/BY
Status
Bank 1 Address
Cell Matrix
(Bank 2)
X-Decoder
X-Decoder
Cell Matrix
(Bank 1)
.
DQ 0 to DQ 15
5
Preview 5 Page |
Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for MBM29DL400BC electronic component. |
| Information | Total 30 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ MBM29DL400BC.PDF Datasheet ] | |
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Featured Datasheets
| Part Number | Description | MFRS |
| MBM29DL400BC | The function is 4M (512K X 8/256K X 16) BIT. Fujitsu Media Devices | |
| MBM29DL400BC-12 | The function is 4M (512K x 8/256K x 16) BIT. Fujitsu |  |
| MBM29DL400BC-55 | The function is 4M (512K x 8/256K x 16) BIT. Fujitsu | |
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