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PDF IC61LV256 Data sheet ( Hoja de datos )

Número de pieza IC61LV256
Descripción 32K x 8 Hight Speed SRAM with 3.3V
Fabricantes ICSI 
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IC61LV256
Document Title
32K x 8 Hight Speed SRAM with 3.3V
Revision History
Revision No
History
0A Initial Draft
0B Add Pb-free parts
Draft Date
Remark
April 19,2002
November 28,2003
The attached datasheets are provided by ICSI. Integrated Circuit Solution Inc reserve the right to change the specifications and
products. ICSI will answer to your questions about device. If you have any questions, please contact the ICSI offices.
Integrated Circuit Solution Inc.
AHSR027-0B 11/28/2003
1

1 page




IC61LV256 pdf
IC61LV256
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
Symbol
tRC
tAA
tOHA
tACE
tDOE
tLZOE(2)
tHZOE(2)
tLZCE(2)
tHZCE(2)
tPU(3)
tPD(4)
Parameter
Read Cycle Time
Address Access Time
Output Hold Time
CE Access Time
OE Access Time
OE to Low-Z Output
OE to High-Z Output
CE to Low-Z Output
CE to High-Z Output
CE to Power-Up
CE to Power-Down
-8 ns
Min. Max.
8—
—8
2—
—8
—4
0—
—4
3—
—4
0—
—8
-10 ns
Min. Max.
10 —
— 10
2—
— 10
—5
0—
—5
3—
—5
0—
— 10
-12 ns
Min. Max.
12 —
— 12
2—
— 12
—6
0—
—5
3—
—6
0—
— 12
-15 ns
Min. Max.
15 —
— 15
2—
— 15
—7
0—
—6
3—
—7
0—
— 15
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse
levels of 0 to 3.0V and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±200 mV from steady-state voltage. Not 100%
tested.
3. Not 100% tested.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Levels
Output Load
Unit
0V to 3.0V
3 ns
1.5V
See Figures 1 and 2
AC TEST LOADS
3.3V
319
OUTPUT
30 pF
Including
jig and
scope
353
Figure 1.
Integrated Circuit Solution Inc.
AHSR027-0B 11/28/2003
3.3V
319
OUTPUT
5 pF
Including
jig and
scope
353
Figure 2.
5

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