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PDF UBA2032 Data sheet ( Hoja de datos )
| Número de pieza | UBA2032 | |
| Descripción | Full bridge driver IC | |
| Fabricantes | NXP Semiconductors | |
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INTEGRATED CIRCUITS
DATA SHEET
UBA2032
Full bridge driver IC
Preliminary specification
2002 Oct 07
1 page  
Philips Semiconductors
Full bridge driver IC
Preliminary specification
UBA2032
handbook, halfpage
−LVS 1
24 GHR
EXTDR 2
23 FSR
+LVS 3
22 SHR
n.c. 4
21 n.c.
HV 5
20 GLR
n.c. 6
19 n.c.
UBA2032T
VDD 7
18 PGND
SU 8
17 GLL
DD 9
16 n.c.
BD 10
15 SHL
RC 11
14 FSL
SGND 12
13 GHL
MGU543
Fig.2 Pin configuration (SO24).
handbook, halfpage
−LVS 1
28 GHR
EXTDR 2
27 FSR
+LVS 3
26 SHR
n.c. 4
25 n.c.
n.c. 5
24 n.c.
HV 6
23 GLR
n.c. 7
22 n.c.
UBA2032TS
n.c. 8
21 PGND
VDD 9
SU 10
20 GLL
19 n.c.
DD 11
18 n.c.
BD 12
17 SHL
RC 13
16 FSL
SGND 14
15 GHL
MGU544
Fig.3 Pin configuration (SSOP28).
FUNCTIONAL DESCRIPTION
Supply voltage
The UBA2032 is powered by a supply voltage applied to
pin HV, for instance the supply voltage of the full bridge.
The IC generates its own low supply voltage for the
internal circuitry. Therefore an additional low voltage
supply is not required. A capacitor has to be connected to
pin VDD to obtain a ripple-free internal supply voltage. The
circuit can also be powered by a low voltage supply directly
applied to pin VDD. In this case pin HV should be
connected to pin VDD or SGND.
Start-up
With an increasing supply voltage the IC enters the
start-up state; the higher power transistors are kept off and
the lower power transistors are switched on. During the
start-up state the bootstrap capacitors are charged and the
bridge output current is zero. The start-up state is defined
until VDD = VDD(UVLO), where UVLO stands for Under
Voltage Lock-out. The state of the outputs during the
start-up phase is overruled by the bridge disable function.
Release of the power drive
At the moment the supply voltage on pin VDD or HV
exceeds the level of release power drive the output voltage
of the bridge depends on the control signal on pin EXTDR
see Table 1. The bridge position after start-up, disable, or
delayed start-up (via pin SU) depends on the status of the
pins DD and EXTDR. If pin DD = LOW (divider enabled)
the bridge will start in the pre-defined position pin GLR
and pin GHL = HIGH and pin GLL and pin GHR = LOW.
If pin DD = HIGH (divider disabled) the bridge position will
depend on the status of pin EXTDR.
If the supply voltage on pin VDD or HV decreases and
drops below the reset level of power drive the IC enters the
start-up state again.
Oscillation
At the point where the supply voltage on pin HV crosses
the level of release power drive, the bridge begins
commutating between the following two defined states:
• Higher left and lower right MOSFETs on,
higher right and lower left MOSFETs off
• Higher left and lower right MOSFETs off,
higher right and lower left MOSFETs on.
2002 Oct 07
5
5 Page 
Philips Semiconductors
Full bridge driver IC
Preliminary specification
UBA2032
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
Internal oscillator
fbridge
∆fosc(T)
∆fosc(VDD)
kH
kL
kosc
Rext
bridge oscillating frequency
oscillator frequency variation
with respect to temperature
oscillator frequency variation
with respect to VDD
high level trip point
low level trip point
oscillator constant
external resistor to VDD
note 3
fbridge = 250 Hz and
Tamb = −40 to +150 °C
fbridge = 250 Hz and
VDD = 7.25 to 14 V
VRC(high) = kH × VDD
VRC(low) = kL × VDD
fbridge = 250 Hz
−−
−10 0
100 kHz
+10 %
−10 0
+10 %
0.38 0.4 0.42
− 0.01 −
0.94 1.02 1.10
100 − − kΩ
Notes
1. The current is specified without commutation of the bridge. The current into pin HV is limited by a thermal protection
circuit. The current is limited to 11 mA at Tj = 150 °C.
2. The current is specified without commutation of the bridge and pin HV is connected to VDD.
3. The minimum frequency is mainly determined by the value of the bootstrap capacitors.
2002 Oct 07
11
11 Page | ||
| Páginas | Total 25 Páginas | |
| PDF Descargar | [ Datasheet UBA2032.PDF ] | |
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