|
|
PDF UC3727 Data sheet ( Hoja de datos )
| Número de pieza | UC3727 | |
| Descripción | Isolated High Side IGBT Driver | |
| Fabricantes | Unitrode | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de UC3727 (archivo pdf) en la parte inferior de esta página. Total 7 Páginas | ||
|
No Preview Available !
Isolated High Side IGBT Driver
UC1727
UC2727
UC3727
FEATURES
• Receives Power and Signal from Single
Isolation Transformer
• Generates Split Rail for 4A Peak Bipolar
Gate Drive
• 16V High Level Gate Drive
• Low Level Gate Drive more Negative
than -5V
• Undervoltage Lockout
• Desaturation Detection and Fault
Processing
• Separate Output Enable Input
• Programmable Stepped Gate Drive for
Soft Turn On
• Programmable Stepped Gate Drive for
Soft Fault
DESCRIPTION
The UC1727 and its companion chip, the UC1726, provide all the
necessary features to drive an isolated IGBT transistor from a TTL in-
put signal. A unique modulation scheme is used to transmit both
power and signal across an isolation boundary with a minimum of ex-
ternal components.
Protection features include under voltage lockout and desaturation
detection. High level gate drive signals are typically 16V. Intermediate
high drive levels can be programmed for various periods of time to
limit surge current at turn on and in the event of desaturation due to a
short circuit.
The chip generates a bipolar supply so that the gate can be driven to
a negative voltage insuring the IGBT remains off in the presence of
high common mode slew rates.
Uses include isolated off-line full bridge and half bridge drives for mo-
tors, switches, and any other load requiring full electrical isolation.
BLOCK DIAGRAM
12/94
UDG-94005-2
1 page  
APPLICATION INFORMATION (cont.)
UC1727
UC2727
UC3727
Figure 2. Input Waveform
Figure 4. Rising Edge Waveform
Figure 3. Output Pulsing Caused By Transformer Ringing Figure 5. Transient Desaturation Response
GATE DRIVE WAVEFORM
The rising edge of OUT can be programmed for a two
step sequence as shown in Figure 4. The plateau voltage
is programmed by a resistive divider from VCC to COM
applied at CLAMP. CLAMP must be bypassed to COM.
The plateau voltage is approximately OUT = CLAMP. The
plateau time is set by a resistor from TRC to VCC and a
capacitor to COM as:
Tp
=
RC
ln
R−7.6k
R−12.4k
.
TRC also programs a blanking time during which the chip
ignores the desaturation comparator. The blanking time
is:
Tb = Tp + 0.4RC.
In the event that desaturation is detected outside the
blanking interval, OUT will be driven back to the CLAMP
plateau for a fault time set by a resistor from FRC to VCC
and a capacitor to COM as:
Tf
=
RC
ln
R−7.6k
R−12.4k
.
If the event is transient, OUT will return high at the end of
Tf as shown in Figure 5. During Tf, FRPLY is open. After
Tf, FRPLY is connected to COM.
Desaturation shown in Figure 6 that persists longer than
Tf will cause OUT to be driven low. The chip will not ac-
cept a command to drive OUT high for a delay period of
Td = 0.4RC
FRPLY will be open during this entire period.
5
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet UC3727.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| UC3724 | Isolated Drive Transmitter | Unitrode |
| UC3724 | Isolated Drive Transmitter |  Texas Instruments |
| UC3725 | Isolated High Side FET Driver | Unitrode |
| UC3725 | Isolated High Side FET Driver (Rev. A) | Texas Instruments |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |