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PDF DS42587 Data sheet ( Hoja de datos )
| Número de pieza | DS42587 | |
| Descripción | MCP Flash Memory and SRAM | |
| Fabricantes | AMD | |
| Logotipo |  |
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DS42587
Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
Am29DL323D Top Boot 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only,
Simultaneous Operation Flash Memory and 8 Mbit (1 Mb x 8-Bit/512 K x 16-Bit) Static RAM
DISTINCTIVE CHARACTERISTICS
MCP Features
s Power supply voltage of 2.7 to 3.3 volt
s High performance
— 85 ns maximum access time
s Package
— 73-Ball FBGA
s Operating Temperature
— –25°C to +85°C
Flash Memory Features
ARCHITECTURAL ADVANTAGES
s Simultaneous Read/Write operations
— Data can be continuously read from one bank while
executing erase/program functions in other bank
— Zero latency between read and write operations
s Secured Silicon (SecSi) Sector: Extra 64 KByte sector
— Factory locked and identifiable: 16 bytes available for
secure, random factory Electronic Serial Number; verifiable
as factory locked through autoselect function.
— Customer lockable: Can be read, programmed, or erased
just like other sectors. Once locked, data cannot be changed
s Zero Power Operation
— Sophisticated power management circuits reduce power
consumed during inactive periods to nearly zero
s Top boot block
s Manufactured on 0.23 µm process technology
s Compatible with JEDEC standards
— Pinout and software compatible with single-power-supply
flash standard
PERFORMANCE CHARACTERISTICS
s High performance
— Access time as fast 85 ns
— Program time: 7 µs/word typical utilizing Accelerate function
s Ultra low power consumption (typical values)
— 2 mA active read current at 1 MHz
— 10 mA active read current at 5 MHz
— 200 nA in standby or automatic sleep mode
s Minimum 1 million write cycles guaranteed per sector
s 20 Year data retention at 125°C
— Reliable operation for the life of the system
SOFTWARE FEATURES
s Data Management Software (DMS)
— AMD-supplied software manages data programming and
erasing, enabling EEPROM emulation
— Eases sector erase limitations
s Supports Common Flash Memory Interface (CFI)
s Erase Suspend/Erase Resume
— Suspends erase operations to allow programming in same
bank
s Data# Polling and Toggle Bits
— Provides a software method of detecting the status of
program or erase cycles
s Unlock Bypass Program command
— Reduces overall programming time when issuing multiple
program command sequences
HARDWARE FEATURES
s Any combination of sectors can be erased
s Ready/Busy# output (RY/BY#)
— Hardware method for detecting program or erase cycle
completion
s Hardware reset pin (RESET#)
— Hardware method of resetting the internal state machine to
reading array data
s WP#/ACC input pin
— Write protect (WP#) function allows protection of two outermost
boot sectors, regardless of sector protect status
— Acceleration (ACC) function accelerates program timing
s Sector protection
— Hardware method of locking a sector, either in-system or
using programming equipment, to prevent any program or
erase operation within that sector
— Temporary Sector Unprotect allows changing data in
protected sectors in-system
SRAM Features
s Power dissipation
— Operating: 50 mA maximum
— Standby: 25 µA maximum
s CE1s# and CE2s Chip Select
s Power down features using CE1s# and CE2s
s Data retention supply voltage: 1.5 to 3.3 volt
s Byte data control: LB#s (DQ0–DQ7), UB#s (DQ8–DQ15)
This document contains information on a product under development at Advanced Micro Devices. The information
Publication# 25097 Rev: A Amendment/0
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed
Issue Date: June 18, 2001
product without notice.
Refer to AMD’s Website (www.amd.com) for the latest information.
1 page  
PRODUCT SELECTOR GUIDE
Part Number
Standard Voltage Range: VCC = 2.7–3.3 V
Max Access Time (ns)
CE# Access (ns)
OE# Access (ns)
MCP BLOCK DIAGRAM
A0 to A20
A–1
WP#/ACC
RESET#
CE#f
CIOf
A0 to A20
Flash Memory
85
85
40
DS42587
VCCf VSS
RY/BY#
32 M Bit
Flash Memory
DQ0 to DQ15/A–1
SRAM
85
85
45
SA
LB#s
UB#s
WE#
OE#
CE1#s
CE2s
CIOs
VCCs/VCCQ VSS/VSSQ
AA00ttooAA1198
8 M Bit
Static RAM
DQ0 to DQ15/A–1
DQ0 to DQ15/A–1
DS42587
5
5 Page 
Table 3. Device Bus Operations—Flash Byte Mode, CIOf = VIL; SRAM Byte Mode, CIOs = VSS
Operation
(Notes 1, 2)
CE#f
CE1#s
CE2s
DQ15/
A–1
OE# WE#
SA
LB#s
(Note 3)
UB#s
(Note 3)
RESET#
WP#/ACC
(Note 4)
DQ0–DQ7
DQ8–DQ15
HX
Read from Flash L
A–1 L H X
X
X
H
L/H
DOUT
High-Z
XL
HX
Write to Flash
L
A–1 H L X
X
X
H (Note 3) DIN
High-Z
XL
Standby
VCC ±
0.3 V
H
X
X
L
XX X
X
X
VCC ±
0.3 V
H
High-Z High-Z
X HH X
L
X
HLH
H HX X
X
L
Output Disable
H L/H High-Z High-Z
HX
L
A–1 H H X
X
X
XL
Flash Hardware
Reset
X
H
X
X
L
X XX X
X
X
L
L/H High-Z High-Z
Sector Protect
(Note 5)
L
H
X
X
L
HL X
X
X VID L/H
DIN
X
Sector Unprotect
(Note 5)
L
H
X
X
L
HL X
X
X
VID (Note 6)
DIN
X
Temporary
Sector Unprotect
X
H
X
x
L
XX X
X
X
VID (Note 6)
DIN
High-Z
Read from
SRAM
H L H X L H SA X X H
X
DOUT
High-Z
Write to SRAM H L H X X L SA X X H X DIN High-Z
Legend: L = Logic Low = VIL, H = Logic High = VIH, VID = 8.5–12.5 V, VHH = 9.0 ± 0.5 V, X = Don’t Care, SA = Sector Address,
AIN = Address In, DIN = Data In, DOUT = Data Out
Notes:
1. Other operations except for those indicated in this column are inhibited.
2. Do not apply CE#f = VIL, CE1#s = VIL and CE2s = VIH at the same time.
3. Don’t care or open LB#s or UB#s.
4. If WP#/ACC = VIL , the boot sectors will be protected. If WP#/ACC = VIH the boot sectors protection will be removed.
If WP#/ACC = VACC (9V), the program time will be reduced by 40%.
5. The sector protect and sector unprotect functions may also be implemented via programming equipment. See the “Sector/Sector
Block Protection and Unprotection” section.
6. If WP#/ACC = VIL, the two outermost boot sectors remain protected. If WP#/ACC = VIH, the two outermost boot sector protection
depends on whether they were last protected or unprotected using the method described in “Sector/Sector Block Protection and
Unprotection”. If WP#/ACC = VHH, all sectors will be unprotected.
DS42587
11
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| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet DS42587.PDF ] | |
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