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PDF TC642 Data sheet ( Hoja de datos )
| Número de pieza | TC642 | |
| Descripción | PWM Fan Speed Controller | |
| Fabricantes | Microchip | |
| Logotipo |  |
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M
TC642
PWM Fan Speed Controller with FanSense™ Technology
Features
• Temperature Proportional Fan Speed for Acoustic
Control and Longer Fan Life
• Efficient PWM Fan Drive
• 3.0V to 5.5V Supply Range:
- Fan Voltage Independent of TC642
Supply Voltage
- Supports any Fan Voltage
• FanSense™ Fault Detection Circuits Protect
Against Fan Failure and Aid System Testing
• Shutdown Mode for "Green" Systems
• Supports Low Cost NTC/PTC Thermistors
• Space Saving 8-Pin MSOP Package
• Over-temperature Indication
Applications
• Power Supplies
• Personal Computers
• File Servers
• Telecom Equipment
• UPSs, Power Amps, etc.
• General Purpose Fan Speed Control
Available Tools
• Fan Controller Demonstration Board (TC642DEMO)
• Fan Controller Evaluation Kit (TC642EV)
Package Types
SOIC/PDIP/MSOP
VIN 1
CF
VMIN
2
3
GND 4
TC642
8 VDD
7 VOUT
6 FAULT
5 SENSE
General Description
The TC642 is a switch mode fan speed controller for
use with brushless DC fans. Temperature proportional
speed control is accomplished using pulse width mod-
ulation (PWM). A thermistor (or other voltage output
temperature sensor) connected to the VIN input fur-
nishes the required control voltage of 1.25V to 2.65V
(typical) for 0% to 100% PWM duty cycle. Minimum fan
speed is set by a simple resistor divider on the VMIN
input. An integrated Start-up Timer ensures reliable
motor start-up at turn-on, coming out of shutdown
mode or following a transient fault. A logic low applied
to VMIN (Pin 3) causes fan shutdown.
The TC642 also features Microchip Technology's pro-
prietary FanSense™ technology for increasing system
reliability. In normal fan operation, a pulse train is
present at SENSE (Pin 5). A missing pulse detector
monitors this pin during fan operation. A stalled, open
or unconnected fan causes the TC642 to trigger its
Start-up Timer once. If the fault persists, the FAULT
output goes low and the device is latched in its shut-
down mode. FAULT is also asserted if the PWM
reaches 100% duty cycle, indicating a possible thermal
runaway situation, although the fan continues to run.
See Section 5.0, “Typical Applications”, for more
information and system design guidelines.
The TC642 is available in the standard 8-pin plastic
DIP, SOIC and MSOP packages and is available in the
commercial, extended commercial and industrial
temperature ranges.
2002 Microchip Technology Inc.
DS21444C-page 1
1 page  
TC642
3.0 DETAILED DESCRIPTION
3.1 PWM
The PWM circuit consists of a ramp generator and
threshold detector. The frequency of the PWM is deter-
mined by the value of the capacitor connected to the CF
input. A frequency of 30 Hz is recommended
(CF = 1 µF). The PWM is also the time base for the
Start-up Timer (see Section 3.4, “Start-Up Timer”). The
PWM voltage control range is 1.25V to 2.65V (typical)
for 0% to 100% output duty cycle.
3.2 FAULT Output
The TC642 detects faults in two ways.
First, pulses appearing at SENSE due to the PWM
turning on are blanked, with the remaining pulses
filtered by a missing pulse detector. If consecutive
pulses are not detected for 32 PWM cycles (≅1 Sec if
CF = 1 µF), the Diagnostic Timer is activated, and VOUT
is driven high continuously for three PWM cycles
(≅100 msec if CF = 1 µF). If a pulse is not detected
within this window, the Start-up Timer is triggered (see
Section 3.4). This should clear a transient fault condi-
tion. If the missing pulse detector times out again, the
PWM is stopped and FAULT goes low. When FAULT is
activated due to this condition, the device is latched in
shutdown mode and will remain off indefinitely.
Note:
At this point, action must be taken to restart
the fan by momentarily pulling VMIN below
VSHDN, or cycling system power. In either
case, the fan cannot remain disabled due
to a fault condition, as severe system dam-
age could result. If the fan cannot be
restarted, the system should be shut down.
The TC642 may be configured to continuously attempt
fan restarts, if so desired.
Continuous restart mode is enabled by connecting the
FAULT output to VMIN through a 0.01 µF capacitor, as
shown in Figure 3-1. When connected in this manner,
the TC642 automatically attempts to restart the fan
every time a fault condition occurs. When the FAULT
output is driven low, the VMIN input is momentarily
pulled below VSHDN, initiating a reset and clearing the
fault condition. Normal fan start-up is then attempted as
previously described. The FAULT output may be
connected to external logic (or the interrupt input of a
microcontroller) to shut the TC642 down if multiple fault
pulses are detected at approximately one second
intervals. Diode D1, capacitor C1 and resistors R5 and
R6 are provided to ensure fan restarts are the result of
a fan fault and not an over-temperature fault. A CMOS
logic OR gate may be substituted for these
components, if available.
From
System
Shutdown
Controller
C1
0.01µF
From
Temp
Sensor
+5V
1
VIN
R1
Q2
(Optional)
R3
3 VMIN
CB
0.01µF
2
R4
CF
CF
1µF
+5V
8
VDD
VDD
R5
10kΩ
D1
R6
1kΩ
FAULT
6
TC642
VOUT 7
5
SENSE
GND
4
+12V
TC642
RESET
1
0
Fault
Detected
Fan
Q1
RBASE
CSENSE
RSENSE
*The parallel combination of R3 and R4 must be >10 kΩ.
FIGURE 3-1:
Fan Fault Output Circuit.
2002 Microchip Technology Inc.
DS21444C-page 5
5 Page 
We can further specify R1 and R2 by the condition that
the divider voltage is equal to our desired VMIN. This
yields the following equation:
EQUATION
VMIN =
VDD x R2
R1 + R2
Solving for the relationship between R1 and R2 results
in the following equation:
EQUATION
R1 = R2 x
VDD - VMIN
VMIN
In this example, R1 = (1.762) R2. Substituting this rela-
tionship back into the previous equation yields the
resistor values:
R2 = 18.1 kΩ, and R1 = 31.9 kΩ
In this case, the standard values of 31.6 kΩ and
18.2 kΩ are very close to the calculated values and
would be more than adequate.
5.3 Operations at Low Duty Cycle
One boundary condition which may impact the selec-
tion of the minimum fan speed is the irregular activation
of the Diagnostic Timer due to the TC642 “missing” fan
commutation pulses at low speeds. This is a natural
consequence of low PWM duty cycles (typically 25% or
less). Recall that the SENSE function detects commu-
tation of the fan as disturbances in the current through
RSENSE. These can only occur when the fan is ener-
gized (i.e., VOUT is “on”). At very low duty cycles, the
VOUT output is “off” most of the time. The fan may be
rotating normally, but the commutation events are
occurring during the PWM’s off-time.
The phase relationship between the fan’s commutation
and the PWM edges tends to “walk around” as the
system operates. At certain points, the TC642 may fail
to capture a pulse within the 32-cycle missing pulse
detector window. When this happens, the 3-cycle
Diagnostic Timer will be activated, the VOUT output will
be active continuously for three cycles and, if the fan is
operating normally, a pulse will be detected. If all is
well, the system will return to normal operation. There
is no harm in this behavior, but it may be audible to the
user as the fan accelerates briefly when the Diagnostic
Timer fires. For this reason, it is recommended that
VMIN be set no lower than 1.8V.
2002 Microchip Technology Inc.
TC642
5.4 FanSense Network
(RSENSE and CSENSE)
The FanSense network, comprised of RSENSE and
CSENSE, allows the TC642 to detect commutation of
the fan motor (FanSense technology). This network
can be thought of as a differentiator and threshold
detector. The function of RSENSE is to convert the fan
current into a voltage. CSENSE serves to AC-couple this
voltage signal and provide a ground-referenced input to
the SENSE pin. Designing a proper SENSE network is
simply a matter of scaling RSENSE to provide the nec-
essary amount of gain (i.e., the current-to-voltage con-
version ratio). A 0.1 µF ceramic capacitor is
recommended for CSENSE. Smaller values require
larger sense resistors, and higher value capacitors are
bulkier and more expensive. Using a 0.1 µF capacitor
results in reasonable values for RSENSE. Figure 5-4
illustrates a typical SENSE network. Figure 5-5 shows
the waveforms observed using a typical SENSE net-
work.
VDD
Fan
VOUT
RBASE
SENSE
CSENSE
(0.1 µF Typ.)
Q1
RSENSE
FIGURE 5-4:
GND
SENSE Network.
Tek Run: 10.0kS/s Sample
[ T]
Waveform @ Sense Resistor
1 GND
Waveform @ Sense Pin
T
90mV
50mV
2 GND
Ch1 100mV Ch2 100mV
M5.00ms Ch1
142mV
FIGURE 5-5:
SENSE Waveforms.
DS21444C-page 11
11 Page | ||
| Páginas | Total 28 Páginas | |
| PDF Descargar | [ Datasheet TC642.PDF ] | |
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