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PDF 11C90 Data sheet ( Hoja de datos )
| Número de pieza | 11C90 | |
| Descripción | 650 MHz Prescalers | |
| Fabricantes | National | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de 11C90 (archivo pdf) en la parte inferior de esta página. Total 10 Páginas | ||
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Not Intended For New Designs
August 1992
11C90 11C91
650 MHz Prescalers
General Description
The 11C90 and 11C91 are high-speed prescalers designed
specifically for communication and instrumentation applica-
tions All discussions and examples in this data sheet are
applicable to the 11C91 as well as the 11C90
The 11C90 will divide by 10 or 11 and the 11C91 by 5 or 6
both over a frequency range from DC to typically 650 MHz
The division ratio is controlled by the Mode Control The
divide-by-10 or -11 capability allows the use of pulse swal-
lowing techniques to control high-speed counting modulos
by lower-speed circuits The 11C90 may be used with either
ECL or TTL power supplies
In addition to the ECL outputs Q and Q the 11C90 contains
an ECL-to-TTL converter and a TTL output The TTL output
operates from the same VCC and VEE levels as the counter
but a separate pin is used for the TTL circuit VEE This mini-
mizes noise coupling when the TTL output switches and
also allows power consumption to be reduced by leaving
the separate VEE pin open if the TTL output is not used
To facilitate capacitive coupling of the clock signal a 400X
resistor (VREF) is connected internally to the VBB reference
Connecting this resistor to the Clock Pulse input (CP) auto-
matically centers the input about the switching threshold
Maximum frequency operation is achieved with a 50% duty
cycle
Each of the Mode Control inputs is connected to an internal
2 kX resistor with the other end uncommitted (RM1 and
RM2) An M input can be driven from a TTL circuit operating
from the same VCC by connecting the free end of the asso-
ciated 2 kX resistor to VCCA When an M input is driven
from the ECL circuit the 2 kX resistor can be left open or if
required can be connected to VEE to act as a pull-down
resistor
Logic Symbol
Connection Diagram
16-Pin DIP
Pin Names
CE
CP
Mn
MS
QQ
QTTL
RMn
VREF
TL F 9892 – 2
Description
Count Enable Input (Active LOW)
Clock Pulse Input
Count Modulus Control Input
Asynchronous Master Set Input
ECL Outputs
TTL Output
2 kX Resistor to Mn
400X Resistor to VBB
C1995 National Semiconductor Corporation TL F 9892
TL F 9892 – 1
RRD-B30M115 Printed in U S A
1 page  
TL F 9892 – 3
Conditions
VCC e a2 0V
VEE e b3 2V
RT e 50X (scope input impedance)
CL e Jig and stray capacitance k 5 0 pF
I1 e L2 e equal 50X impedance lines
C e 0 1 pF
Note 7 Use high impedance to test QTTL
Connect pin 13 to VEE
Note 8 For High frequency test use AC coupled input as in Figure 3
Adjust input amplitude to 350 mV peak-to-peak
FIGURE 1 AC Test Circuit
TL F 9892 – 4
5
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet 11C90.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| 11C90 | 650 MHz Prescalers | National |
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