PDF ICX432DQ Data sheet ( Hoja de datos )

Número de pieza	ICX432DQ
Descripción	Diagonal 6.67mm (Type 1/2.7) Frame Readout CCD Image Sensor
Fabricantes	Sony
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No Preview Available ! ICX432DQ Diagonal 6.67mm (Type 1/2.7) Frame Readout CCD Image Sensor with a Square Pixel for Color Cameras Description The ICX432DQ is a diagonal 6.67mm (Type 1/2.7) 18 pin DIP (Plastic) interline CCD solid-state image sensor with a square pixel array and 3.24M effective pixels. Adoption of a 3-field readout system ensures small size and high performance. This chip features an electronic shutter with variable charge-storage time. R, G, B primary color mosaic filters are used as the color filters, and at the same time high sensitivity and low dark current are achieved through the adoption of Super HAD CCD technology. This chip is suitable for applications such as electronic still cameras, etc. Pin 1 Features • Supports frame readout system • High horizontal and vertical resolution • Supports high frame rate readout mode : 30 frames/s, V AF mode : 60 frames/s, 50 frames/s • Square pixel • Horizontal drive frequency: 24.3MHz • No voltage adjustments (reset gate and substrate bias are not adjusted.) • R, G, B primary color mosaic filters on chip 4 Pin 11 H 48 • High sensitivity, low dark current • Continuous variable-speed shutter • Excellent anti-blooming characteristics Optical black position (Top View) • 18-pin high-precision plastic package 2 8 Device Structure • Interline CCD image sensor • Total number of pixels: 2140 (H) × 1560 (V) approx. 3.34M pixels • Number of effective pixels: 2088 (H) × 1550 (V) approx. 3.24M pixels • Number of active pixels: 2080 (H) × 1542 (V) approx. 3.21M pixels diagonal 6.667mm • Number of recommended recording pixels: 2048 (H) × 1536 (V) approx. 3.15M pixels diagonal 6.592mm aspect ratio 4:3 • Chip size: 6.10mm (H) × 4.95mm (V) • Unit cell size: 2.575µm (H) × 2.575µm (V) • Optical black: Horizontal (H) direction: Front 4 pixels, rear 48 pixels Vertical (V) direction: Front 8 pixels, rear 2 pixels • Number of dummy bits: Horizontal 28 Vertical 1 (3rd field only) • Substrate material: Silicon ∗ Super HAD CCD is a trademark of Sony Corporation. The Super HAD CCD is a version of Sony's high performance CCD HAD (Hole- Accumulation Diode) sensor with sharply improved sensitivity by the incorporation of a new semiconductor technology developed by Sony Corporation. Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E02122A27 1 page ICX432DQ Clock Equivalent Circuit Constants Item Symbol CφV1 Capacitance between vertical transfer clock and GND CφV3A, CφV3B, CφV5A, CφV5B CφV2, CφV4, CφV6 CφV12 Capacitance between vertical transfer clocks CφV23A, CφV23B, CφV45A, CφV45B CφV3A4, CφV3B4, CφV5A6, CφV5B6 CφV61 Capacitance between horizontal transfer clock and GND CφH1, CφH2 Capacitance between horizontal transfer clocks CφHH Capacitance between reset gate clock and GND CφRG Capacitance between substrate clock and GND CφSUB R1, R2, R4, R6 Vertical transfer clock series resistor R3A, R5A R3B, R5B Vertical transfer clock ground resistor RGND Horizontal transfer clock series resistor RφH Min. Typ. Max. Unit Remarks 1280 pF 640 pF 400 pF 510 pF 50 pF 260 pF 100 pF 40 pF 70 pF 8 pF 1000 60 240 80 18 13 pF Ω Ω Ω Ω Ω Vφ1 Vφ2 R1CφV12 R2 CφV61 R6 CφV1 CφV2 CφV23A R3A Vφ6 CφV6 CφV3A Vφ3A CφV5B6 R5B Vφ5B CφV5A6 CφV5B CφV3B RGND CφV4 CφV23B R3B Vφ3B CφV45B CφV5A CφV3B4 CφV45A R5A CφV3A4 R4 Vφ5A Vφ4 Vertical transfer clock equivalent circuit RφH Hφ1 CφH1 CφHH RφH Hφ2 CφH2 Horizontal transfer clock equivalent circuit –5– 5 Page ICX432DQ Readout modes 1. Readout modes list The following readout modes are possible by driving the image sensor at the timing specifications noted in this Data Sheet. Mode name Frame readout mode NTSC mode PAL mode High frame rate readout mode NTSC mode PAL mode AF mode NTSC mode PAL mode Frame rate 5.0 frame/s 5.0 frame/s 30 frame/s 25 frame/s 60 frame/s 50 frame/s Number of effective output lines 1550 (1st 517, 2nd 516, 3nd 517) 1550 (1st 517, 2nd 516, 3nd 517) 258 258 96 123 2. Frame readout mode, high frame rate readout mode 1st field Frame readout mode 2nd field 3rd field 13 R Gr 13 R Gr 13 R Gr 12 Gb B 12 Gb B 12 Gb B 11 R Gr 11 R Gr 11 R Gr 10 Gb B 10 Gb B 10 Gb B 9R Gr 9R Gr 9R Gr 8 Gb B 8 Gb B 8 Gb B 7R Gr 7R Gr 7R Gr 6 Gb B 6 Gb B 6 Gb B 5R Gr 5R Gr 5R Gr 4 Gb B 4 Gb B 4 Gb B 3R Gr 3R Gr 3R Gr 2 Gb B 2 Gb B 2 Gb B VOUT 1 R Gr 1 VOUT R Gr 1 R VOUT Gr High frame rate readout mode VOUT 13 12 11 10 9 8 7 6 5 4 3 2 1 R Gb R Gb R Gb R Gb R Gb R Gb R Gr B Gr B Gr B Gr B Gr B Gr B Gr Note) Blacked out portions in the diagram indicate pixels which are not read out. 1. Frame readout mode In this mode, all pixel signals are divided into three fields and output. All pixel signals are read out independently, making this mode suitable for high resolution image capturing. 2. High frame rate readout mode Output is performed at 30 frames per second by reading out 4 pixels for every 12 vertical pixels and adding 2 pixels in the horizontal CCD. The number of output lines is 258 lines. This readout mode emphasizes processing speed over vertical resolution. – 11 – 11 Page

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