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PDF DP7304B Data sheet ( Hoja de datos )
| Número de pieza | DP7304B | |
| Descripción | 8-BIT TRI-STATE BIDIRECTIONAL TRANSCEIVER | |
| Fabricantes | National | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de DP7304B (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
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February 1996
DP7304B DP8304B 8-Bit TRI-STATE
Bidirectional Transceiver (Non-Inverting)
General Description
The DP73048B DP8304B are high speed Schottky 8-bit
TRI-STATE bidirectional transceivers designed to provide
bidirectional drive for bus oriented microprocessor and digi-
tal communications systems They are all capable of sinking
16 mA on the A ports and 48 mA on the B ports (bus ports)
PNP inputs for low input current and an increased output
high (VOH) level allow compatibility with MOS CMOS and
other technologies that have a higher threshold and less
drive capabilities In addition they all feature glitch-free
power up down on the B port preventing erroneous glitches
on the system bus in power up or down
DP7304B DP8304B are featured with Transmit Receive
(T R) and Chip Disable (CD) inputs to simplify control logic
Features
Y 8-bit bidirectional data flow reduces system package
count
Y Bidirectional TRI-STATE inputs outputs interface with
bus oriented systems
Y PNP inputs reduce input loading
Y Output high voltage interfaces with TTL MOS and
CMOS
Y 48 mA 300 pF bus drive capability
Y Pinouts simplify system interconnections
Y Transmit Receive and chip disable simplify control logic
Y Compact 20-pin dual-in-line package
Y Bus port glitch free power up down
Logic and Connection Diagrams
Dual-In-Line Package
TL F 8793 – 1
Logic Table
Chip Disable
0
0
1
X e Don’t Care
Inputs
Transmit Receive
0
1
X
TRI-STATE is a registered trademark of National Semiconductor Corp
C1996 National Semiconductor Corporation TL F 8793
Top View
TL F 8793 – 2
Order Number DP7304BJ DP8304BJ
DP8304BN or DP8304BWM
See NS Package Number J20A N20A or M20B
Resulting Conditions
A Port
B Port
OUT
IN
IN OUT
TRI-STATE
TRI-STATE
RRD-B30M36 Printed in U S A
http www national com
1 page  
Switching Time Waveforms and AC Test Circuits (Continued)
TL F 8793 – 5
Note C2 and C3 include test fixture capacitance
FIGURE B Propagation Delay from T R to A Port or B Port
TL F 8793 – 6
TL F 8793 – 7
TL F 8793 – 8
Note C4 includes test fixture capacitance
Port input is in a fixed logical
condition See AC table
FIGURE C Propagation Delay to from TRI-STATE from CD to A Port or B Port
5 http www national com
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet DP7304B.PDF ] | |
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