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PDF DS1220Y Data sheet ( Hoja de datos )
| Número de pieza | DS1220Y | |
| Descripción | 16k Nonvolatile SRAM | |
| Fabricantes | Dallas | |
| Logotipo |  |
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FEATURES
10 years minimum data retention in the
absence of external power
Data is automatically protected during power
loss
Directly replaces 2k x 8 volatile static RAM
or EEPROM
Unlimited write cycles
Low-power CMOS
JEDEC standard 24-pin DIP package
Read and write access times as fast as 100 ns
Full ±10% operating range
Optional industrial temperature range of
-40°C to +85°C, designated IND
DS1220Y
16k Nonvolatile SRAM
PIN ASSIGNMENT
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
GND
1
2
3
4
5
6
7
8
9
10
11
12
24 VCC
23 A8
22 A9
21 WE
20 OE
19 A10
18 CE
17 DQ7
16 DQ6
15 DQ5
14 DQ4
13 DQ3
24-Pin ENCAPSULATED PACKAGE
720-mil EXTENDED
PIN DESCRIPTION
A0-A10
- Address Inputs
DQ0-DQ7
- Data In/Data Out
CE - Chip Enable
WE - Write Enable
OE
VCC
GND
- Output Enable
- Power (+5V)
- Ground
DESCRIPTION
The DS1220Y 16k Nonvolatile SRAM is a 16,384-bit, fully static, nonvolatile RAM organized as 2048
words by 8 bits. Each NV SRAM has a self-contained lithium energy source and control circuitry which
constantly monitors VCC for an out-of-tolerance condition. When such a condition occurs, the lithium
energy source is automatically switched on and write protection is unconditionally enabled to prevent
data corruption. The NV SRAM can be used in place of existing 2k x 8 SRAMs directly conforming to
the popular bytewide 24-pin DIP standard. The DS1220Y also matches the pinout of the 2716 EPROM or
the 2816 EEPROM, allowing direct substitution while enhancing performance. There is no limit on the
number of write cycles that can be executed and no additional support circuitry is required for
microprocessor interfacing.
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READ CYCLE
SEE NOTE 1
WRITE CYCLE 1
DS1220Y
SEE NOTES 2, 3, 4, 6, 7, 8 AND 12
WRITE CYCLE 2
SEE NOTES 2, 3, 4, 6, 7, 8 AND 13
5 of 8
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet DS1220Y.PDF ] | |
Hoja de datos destacado
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