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PDF M30620FCPGP Data sheet ( Hoja de datos )
| Número de pieza | M30620FCPGP | |
| Descripción | Single-Chip 16 Bit CMOS Microcomputer | |
| Fabricantes | Renesas | |
| Logotipo |  |
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M16C/62P Group (M16C/62P, M16C/62PT)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
REJ03B0001-0230Z
Rev.2.30
Sep 01, 2004
1. Overview
The M16C/62P Group (M16C/62P, M16C/62PT) of single-chip microcomputers are built using the high-
performance silicon gate CMOS process using a M16C/60 Series CPU core and are packaged in a 80-pin,
100-pin and 128-pin plastic molded QFP. These single-chip microcomputers operate using sophisticated
instructions featuring a high level of instruction efficiency. With 1M bytes of address space, they are ca-
pable of executing instructions at high speed. In addition, this microcomputer contains a multiplier and
DMAC which combined with fast instruction processing capability, makes it suitable for control of various
OA, communication, and industrial equipment which requires high-speed arithmetic/logic operations.
1.1 Applications
Audio, cameras, television, home appliance, office/communications/portable/industrial equipment,
automobile, etc
Specifications written in this manual are believed to be accurate, but are
not guaranteed to be entirely free of error. Specifications in this manual
may be changed for functional or performance improvements. Please make
sure your manual is the latest edition.
Rev. 2.30 Sep 01, 2004 page 1
REJ03B0001-0230Z
of 84
1 page  
M16C/62P Group (M16C/62P, M16C/62PT)
1. Overview
1.3 Block Diagram
Figure 1.1 is a block diagram of the M16C/62P Group (M16C/62P, M16C/62PT) 128-pin and 100-pin ver-
sion, figure 1.2 is a block diagram of the M16C/62P Group (M16C/62P, M16C/62PT) 80-pin version.
8 888 8 8
8
Port P0
Port P1
Port P2 Port P3
<VCC2 ports>(4)
Port P4
Port P5
Port P6
<VCC1 ports>(4)
Internal peripheral functions
Timer (16-bit)
Output (timer A): 5
Input (timer B): 6
Three-phase motor
control circuit
A/D converter
(10 bits X 8 channels
Expandable up to 26 channels)
UART or
clock synchronous serial I/O
(8 bits X 3 channels)
CRC arithmetic circuit (CCITT )
(Polynomial : X16+X12+X5+1)
System clock
generation circuit
XIN-XOUT
XCIN-XCOUT
PLL frequency synthesizer
On-chip oscillator
Clock synchronous serial I/O
(8 bits X 2 channels)
M16C/60 series16-bit CPU core
Memory
Watchdog timer
(15 bits)
DMAC
(2 channels)
D/A converter
(8 bits X 2 channels)
R0H R0L
R1H R1L
R2
R3
A0
A1
FB
SB
USP
ISP
INTB
PC
FLG
ROM (1)
RAM (2)
Multiplier
<VCC1 ports>(4)
Port P11
(3)
Port P14
(3)
<VCC2 ports>(4)
Port P12 Port P13
(3) (3)
82
88
NOTES :
1. ROM size depends on microcomputer type.
2. RAM size depends on microcomputer type.
3. Ports P11 to P14 exist only in 128-pin version.
4. Use M16C/62PT on VCC1= VCC2.
Figure 1.1 M16C/62P Group (M16C/62P, M16C/62PT) 128-pin and 100-pin version Block Diagram
Rev. 2.30 Sep 01, 2004 page 5 of 84
REJ03B0001-0230Z
5 Page 
M16C/62P Group (M16C/62P, M16C/62PT)
1. Overview
Table 1.8 Product Code of Flash Memory version and ROMless version for M16C/62P
Flash Memory
Version
ROMless Version
Product
Code
D3
D5
D7
D9
U3
U5
U7
U9
Package
Lead-included
Lead-free
Internal ROM
(User ROM Area
Without Block 1)
Program Temperature
and Erase
Range
Endurance
100
1,000
100
0°C to 60°C
1,000
D3
Lead-included
D5
U3
U5 Lead-free
Internal ROM
(Block A, Block 1)
Program
and Erase
Endurance
Temperature
Range
100 0°C to 60°C
10,000
-40°C to 85°C
-20°C to 85°C
100 0°C to 60°C
10,000
-40°C to 85°C
-20°C to 85°C
Operating
Ambient
Temperature
-40°C to 85°C
-20°C to 85°C
-40°C to 85°C
-20°C to 85°C
-40°C to 85°C
-20°C to 85°C
-40°C to 85°C
-20°C to 85°C
-40°C to 85°C
-20°C to 85°C
-40°C to 85°C
-20°C to 85°C
M1 6 C
M3 0 6 2 6 FHPF P
B D5
XXXXXXX
Type No. (See Figure 1.3 Type No., Memory Size, and Package)
Chip version and product code
B : Shows chip version.
Henceforth, whenever it changes a version, it continues with B, C, and D.
D5 : Shows Product code. (See table 1.8 Product Code)
Date code seven digits
The product without marking of chip version of the flash memory version and the ROMless version
corresponds to the chip version “A”.
Figure 1.4 Marking Diagram of Flash Memory version and ROMless version for M16C/62P (Top View)
Rev. 2.30 Sep 01, 2004 page 11 of 84
REJ03B0001-0230Z
11 Page | ||
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| PDF Descargar | [ Datasheet M30620FCPGP.PDF ] | |
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