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PDF ICL8048 Data sheet ( Hoja de datos )
| Número de pieza | ICL8048 | |
| Descripción | Log Amplifier | |
| Fabricantes | INTERSIL | |
| Logotipo |  |
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Data Sheet
ICL8048
August 1999 File Number 2865.2
Log Amplifier
The ICL8048 is a monolithic logarithmic amplifier capable of
handling six decades of current input, or three decades of
voltage input. It is fully temperature compensated and is
nominally designed to provide 1V of output for each decade
change of input. For increased flexibility, the scale factor,
reference current and offset voltage are externally
adjustable.
Ordering Information
PART
ERROR TEMPERATURE
PKG.
NUMBER (25oC) RANGE (oC) PACKAGE NO.
ICL8048BCJE 30mV
0 to 70
16 Ld CERDIP F16.3
Pinout
ICL8048
(CERDIP)
TOP VIEW
GND 1
IIN 2
NC 3
A1 OFFSET
NULL
A1 OFFSET
NULL
V-
4
5
6
A1 OUTPUT 7
NC 8
16 IREF
15 GAIN
14 NC
13
A2 OFFSET
NULL
12 A2 OFFSET
NULL
11 V+
10 VOUT
9 NC
Features
• Full Scale Accuracy . . . . . . . . . . . . . . . . . . . . . . . . . 0.5%
• Temperature Compensated Operation . . . . . . 0oC to 70oC
• Scale Factor, Adjustable. . . . . . . . . . . . . . . . . 1V/Decade
• Dynamic Current Range. . . . . . . . . . . . . . . . . . . . . 120dB
• Dynamic Voltage Range . . . . . . . . . . . . . . . . . . . . . . 60dB
• Dual JFET Input Op Amps
Functional Diagram
ICL8048
fIN
VIN 2
GND 1
VREF
Q1
16
Q2
IREF
-+
A1 A2
+-
VOUT
10
7 15
GAIN
A1 OUTPUT
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
1 page  
ICL8048
0.1µF
1K
0.1µF
0.1µF
0V
-
ICL7650
+
RIN
VIN
IIN
VOFFSET 2
1
33kΩ
4
-
A1
+
C1
150pF
33kΩ
VREF
(+15V)
5
Q1
RREF
IREF
Q2
R5
2kΩ
16 12 13
R3
ICL8048
+
A2
-
R1
15.9kΩ
A1 OUTPUT
7
GAIN
15 R2
680Ω
(LOW T.C.) 1kΩ
V+
10
VOUT
FIGURE 9. ICL8048 OFFSET NULLED BY ICL7650
Figure 9 shows the ICL8048 in an automatic offset nulling
configuration using the ICL7650S. The extremely low offset
voltage of the ICL7650S forces its non-inverting input (and thus
pin 2 of the ICL8048) to the same potential as its inverting input
by nulling the first stage of the log amp. Since VOFFSET is now
within a few µV of ground potential, RIN can perform its voltage
to current conversion much more accurately, and without an
offset trimmer pot. Step 1 of the offset and scale factor
adjustment is eliminated, simplifying calibration.
NOTE: The ICL7650S op amp has a maximum supply voltage of
18V. The ICL8048 will operate at this voltage, but IREF must be
limited to 200µA or less for proper calibration and operation. Best
performance will be achieved when the ICL7650S has a ±3V to ±8V
supply and the ICL8048 is at its recommended ±15V supply. See
A053 for a method of powering the ICL7650S from a ±15V source.
Frequency Compensation
Although the op amps in the ICL8048 are compensated for
unity gain, some additional frequency compensation is
required. This is because the log transistors in the feedback
loop add to the loop gain. In the ICL8048, 150pF should be
connected between Pins 2 and 7 (Figure 7).
Error Analysis
Performing a meaningful error analysis of a circuit containing a
log and antilog amplifiers is more complex than dealing with a
similar circuit involving only op amps. In this data sheet every
effort has been made to simplify the analysis task, without in
any way compromising the validity of the resultant numbers.
The key difference in making error calculations in log/antilog
amps, compared with op amps, is that the gain of the former
is a function of the input signal level. Thus, it is necessary,
when referring errors from output to input, or vice versa, to
check the input voltage level, then determine the gain of the
circuit by referring to the graphs given in the Typical
Performance Curves section.
The various error terms in the log amplifier, the ICL8048, are
Referred To the Output (RTO) of the device. The errors are
expressed in this way because in the majority of systems a
number of log amps interface with an antilog amp, as shown
in Figure 10.
INPUT LOG AMP
A
LOG AMP
INPUT
B
ERROR DUE TO A (RTO)
= xmV
ERROR DUE TO C (RTI)
= zmV
ANTI LOG OUTPUT
AMP
AC
ERROR DUE TO B (RTO)
= ymV
FIGURE 10.
It is very straightforward to estimate the system error at node
(A) by taking the square root of the sum-of-the-squares of
the errors of each contributing block.
Total Error = x2 + y2 + z2at (A)
If required, this error can be referred to the system output
through the voltage gain of the antilog circuit, using the
voltage gain versus input voltage plot.
The numerical values of x, y, and z in the above equation are
obtained from the maximum error voltage plots. For
example, with the ICL8048BC, the maximum error at the
output is 30mV at 25oC. This means that the measured
output will be within 30mV of the theoretical transfer
function, provided the unit has been adjusted per the
procedures described previously. Figure 11 illustrates this
point.
5
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