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MAX3873AEGP fiches techniques PDF

Maxim Integrated - Low-Power / Compact 2.5Gbps/2.7Gbps Clock-Recovery and Data-Retiming IC

Numéro de référence MAX3873AEGP
Description Low-Power / Compact 2.5Gbps/2.7Gbps Clock-Recovery and Data-Retiming IC
Fabricant Maxim Integrated 
Logo Maxim Integrated 





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MAX3873AEGP fiche technique
19-2577; Rev 1; 5/03
Low-Power, Compact 2.5Gbps/2.7Gbps
Clock-Recovery and Data-Retiming IC
General Description
The MAX3873A is a compact, low-power 2.488Gbps/
2.67Gbps clock-recovery and data-retiming IC for
SDH/SONET applications. The phase-locked loop (PLL)
recovers a synchronous clock signal from the serial
NRZ data input. The input data is then retimed by this
recovered clock, providing a clean data output. The
MAX3873A meets all SDH/SONET jitter specifications,
does not require an external reference clock to aid in
frequency acquisition, and provides excellent tolerance
to both deterministic and sinusoidal jitter. The
MAX3873A provides a PLL loss-of-lock (LOL) output to
indicate whether the CDR is in lock. The recovered data
and clock outputs are CML with on-chip 50back termi-
nations on each line. The clock output can be powered
down if not used.
The MAX3873A is implemented in Maxim’s second-
generation SiGe process and consumes only 260mW at
3.3V supply (output clock disabled, low output swing). The
device is available in a 4mm x 4mm 20-pin QFN
exposed-pad package and operates from -40°C to +85°C.
Applications
Switch Matrix Backplanes
SDH/SONET Receivers and Regenerators
Add/Drop Multiplexers
Digital Cross-Connects
SDH/SONET Test Equipment
DWDM Transmission Systems
Features
Fully Integrated Clock Recovery and Data
Retiming
Power Dissipation: 260mW with +3.3V Supply
Clock Jitter Generation: 5mUIRMS
Exceeds ANSI, ITU, and Bellcore SDH/SONET
Jitter Specifications
Differential Input Range: 50mVP-P to 1.6VP-P
Single +3.3V Power Supply
PLL Fast Track (FASTRACK) Mode Available
Clock Output Can Be Disabled
Input Data Rate: 2.488Gbps or 2.67Gbps
Selectable Output Amplitude
Tolerates 2000 Consecutive Identical Digits
Loss-of-Lock Indicator
Differential CML Data and Clock Outputs
Operating Temperature Range: -40°C to +85°C
Ordering Information
PART
TEMP RANGE PIN-
PACKAGE
MAX3873AEGP -40°C to +85°C
20 QFN
(4mm x 4mm)
PKG
CODE
G2044
Pin Configuration
TOP VIEW
Typical Application Circuit appears at end of data sheet.
RATESET
VCC
SDI+
SDI-
VCC
1
2
3
4
5
MAX3873A
15 SDO+
14 SDO-
13 VCC_BUF
12 SCLKO+
11 SCLKO-
QFN**
**NOTE: THE EXPOSED PAD MUST BE
SOLDERED TO THE SUPPLY GROUND.
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

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