|
|
PDF MAX3805ETE Data sheet ( Hoja de datos )
| Número de pieza | MAX3805ETE | |
| Descripción | 10.7Gbps Adaptive Receive Equalizer | |
| Fabricantes | Maxim Integrated | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de MAX3805ETE (archivo pdf) en la parte inferior de esta página. Total 10 Páginas | ||
|
No Preview Available !
19-2936; Rev 0; 7/03
10.7Gbps Adaptive Receive Equalizer
General Description
The MAX3805 is designed to provide up to 30in
(0.75m) reach on 6-mil differential FR-4 transmission
line, or up to 24ft (8m) on RG-188A/U type coaxial
cable, for PRBS data from 9.95Gbps to 10.7Gbps. The
MAX3805 adaptive equalizer reduces intersymbol inter-
ference, resulting in 20ps residual jitter after equaliza-
tion. An internal feedback network controls the
equalizer to automatically match frequency-dependent
skin effect and dielectric losses. The MAX3805 pro-
vides LVCMOS-compatible output-enable and signal-
detect functions.
The MAX3805 has separate supply connections for the
internal logic and I/O circuits. This allows the current-
mode logic (CML) input and CML output to be connect-
ed to isolated supplies for independent DC-coupled
interfaces to 1.8V, 2.5V, or 3.3V ICs. The MAX3805
comes in a very small 3mm x 3mm package and con-
sumes only 135mW.
Applications
OC-192, 10GbE Switches and Routers
OC-192, 10GbE Serial Modules
High-Speed Signal Distribution
Features
o 3mm x 3mm Package
o Spans 30in (0.75m) of 6-mil FR-4
o Spans 24ft (8m) of Coax
o Automatic Receive Equalization to Reduce ISI
Caused by Path Losses
o Up to 10.7Gbps NRZ Data Operating Range
o Signal-Detect Output
o Output-Enable Control
o 135mW Power Consumption
o DC-Coupled Input and Output to Terminations as
Low as 1.65V
o Differential or Single-Ended Operation
o +3.3V Core Power Supply
Ordering Information
PART
TEMP RANGE PIN-
PACKAGE
MAX3805ETE -40°C to +85°C 16 Thin QFN
PACKAGE
CODE
T1633F-3
Pin Configuration appears at end of data sheet.
Typical Operating Circuit
LINE CARD
2.5V
10Gbps
CDR/SERDES
Tx
2
2
Rx
FR-4 STRIPLINE
+3.3V
VCC
2
SDO
MAX3805
2
SDI
VCC2 SD EN VCC1
SWITCH CARD
+3.3V
VCC1
VCC VCC2
SDI
2
MAX3805
SDO
SD EN
2
1.8V
10Gbps
SWITCH
Rx
2
FR-4 STRIPLINE
2
Tx
2.5V 1.8V
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1 page  
10.7Gbps Adaptive Receive Equalizer
PIN
1
2
3
4
5
6
7
8
9, 12
10
11
13
14
15
16
EP
Pin Description
NAME
FUNCTION
VCC1
SDI+
Supply Voltage, CML Input (1.8V to VCC)
Positive Differential Serial Data Input, CML
SDI- Negative Differential Serial Data Input, CML
VCC1
GND
Supply Voltage, CML Input (1.8V to VCC)
Supply Ground
SD Signal-Detect Output, LVCMOS. Low indicates <200mVP-P, high indicates >220mVP-P.
EN Enable Input, LVCMOS. Low disables output, high enables output, typically connected to SD.
GND Supply Ground
VCC2
SDO-
Supply Voltage, CML Output (1.8V to VCC)
Negative Differential Serial Data Output, CML
SDO+ Positive Differential Serial Data Output, CML
HFPD High-Frequency Power Detector. Leave open for 9.953Gbps to 10.7Gbps PRBS NRZ data.
LFPD
VCC
GND
Low-Frequency Power Detector. Leave open for 9.953Gbps to 10.7Gbps PRBS NRZ data.
Supply Voltage, Equalizer Core, 3.3V
Supply Ground
Exposed Ground. The exposed pad must be soldered to the circuit board ground plane for proper thermal and
Pad electrical performance.
Detailed Description and
Applications Information
The MAX3805 adaptive equalizer is designed to oper-
ate with 9.95Gbps to 10.7Gbps PRBS nonreturn-to-zero
(NRZ) data at the receive end of a transmission line,
typically differential 6-mil FR-4 PC board. It adaptively
corrects intersymbol interference caused by frequency-
dependent path loss. It can also be used with coaxial
cable links and with transmission lines that include well-
engineered connectors, as long as the total path loss is
relatively smooth and does not exceed 20dB at 5GHz.
The signal path for the MAX3805 consists of a CML
input stage, two amplifiers feeding a pair of variable
attenuators controlled by feedback, and a limiting
amplifier with a CML output stage. An enable input, EN,
is used to control the output stage. A signal-detect out-
put, SD, indicates when input signal to the transmission
line is above 220mVP-P or below 200mVP-P, typically.
See the Functional Diagram.
CML Input and Output Buffers
The MAX3805 CML input and output buffers are inter-
nally terminated with 50Ω to VCC1 and VCC2, respec-
tively. The input and output circuitry have separate
voltage connections to control noise coupling and pro-
vide DC-coupling to +1.8V, +2.5V, or +3.3V CML. If
desired, the CML inputs and outputs can be AC-cou-
pled. See Figure 1 for the output structure.
The low-frequency cutoff of the input-stage offset-can-
cellation circuit is nominally 21kHz.
For single-ended operation (typically coaxial cable
links), the input must be AC-coupled; connect the
unused input to VCC1 using a series combination of an
AC-coupling capacitor and a 50Ω resistor, as shown in
Figure 2. Note that the MAX3805 is specified for differ-
ential operation, and the performance may be reduced
in single-ended operation.
_______________________________________________________________________________________ 5
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet MAX3805ETE.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| MAX3805ETE | 10.7Gbps Adaptive Receive Equalizer | Maxim Integrated |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |