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PDF MAX3664 Data sheet ( Hoja de datos )
| Número de pieza | MAX3664 | |
| Descripción | 622Mbps / Ultra-Low-Power / 3.3V Transimpedance Preamplifier for SDH/SONET | |
| Fabricantes | Maxim Integrated | |
| Logotipo |  |
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19-0479; Rev 1; 7/97
EVAALVUAAILTAIOBNLEKIT
622Mbps, Ultra-Low-Power, 3.3V
Transimpedance Preamplifier for SDH/SONET
________________General Description
The MAX3664 low-power transimpedance preamplifier
for 622Mbps SDH/SONET applications consumes only
85mW. Operating from a single +3.3V supply, it converts
a small photodiode current to a measurable differential
voltage. A DC cancellation circuit provides a true differ-
ential output swing over a wide range of input current
levels, thus reducing pulse-width distortion. The differen-
tial outputs are back-terminated with 60Ω per side.
The transimpedance gain is nominally 6kΩ. For input
signal levels beyond approximately 100µAp-p, the
amplifier will limit the output swing to 900mV. The
MAX3664’s low 55nA input noise provides a typical
sensitivity of -33.2dBm in 1300nm, 622Mbps receivers.
The MAX3664 is designed to be used in conjunction
with the MAX3675 clock recovery and data retiming IC
with limiting amplifier. Together, they form a complete
3.3V, 622Mbps SDH/SONET receiver.
In die form, the MAX3664 is designed to fit on a header
with a PIN diode. It includes a filter connection, which
provides positive bias for the photodiode through a 1kΩ
resistor to VCC. The device is also available in 8-pin SO
and µMAX packages.
________________________Applications
SDH/SONET Receivers
PIN/Preamplifier Receivers
Regenerators for SDH/SONET
____________________________Features
o Single +3.3V Supply Operation
o 55nARMS Input-Referred Noise
o 6kΩ Gain
o 85mW Power
o 300µA Peak Input Current
o 200ps Max Pulse-Width Distortion
o Differential Output Drives 100Ω Load
o 590MHz Bandwidth
_______________Ordering Information
PART
MAX3664E/D
MAX3664ESA
MAX3664EUA*
TEMP. RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
Dice
8 SO
8 µMAX
* Contact factory for package availability.
Pin Configuration appears at end of data sheet.
__________________________________________________Typical Application Circuit
100pF
VCC (+3.3V)
0.01µF
1k
(FILT)
INREF2
INREF1
VCC
OUT+
MAX3664
IN OUT-
COMP
GND
100Ω
47nF
47nF
400pF
( ) ARE FOR MAX3664E/D (DICE) ONLY.
VCC (+3.3V)
LIMITING
AMP
MAX3675
DATA
AND
CLOCK
RECOVERY
DATA
CLK
________________________________________________________________ Maxim Integrated Products 1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.
For small orders, phone 408-737-7600 ext. 3468.
1 page  
622Mbps, Ultra-Low-Power, 3.3V
Transimpedance Preamplifier for SDH/SONET
________________Detailed Description
The MAX3664 is a transimpedance amplifier designed
for 622Mbps SDH/SONET applications. It comprises a
transimpedance amplifier, a paraphase amplifier with
emitter-follower outputs, and a DC cancellation loop.
Figure 1 is a functional diagram of the MAX3664.
Transimpedance Amplifier
The signal current at IN flows into the summing node of
a high-gain amplifier. Shunt feedback through RF con-
verts this current to a voltage with a gain of 6kΩ. Diode
D1 clamps the output voltage for large input currents.
INREF1 is a direct connection to the emitter of the input
transistor, and must be connected directly to the pho-
todetector AC ground return for best performance.
Paraphase Amplifier
The paraphase amplifier converts single-ended inputs to
differential outputs, and introduces a voltage gain of 2.
This signal drives a pair of internally biased emitter follow-
ers, Q2 and Q3, which form the output stage. Resistors
R1 and R2 provide back-termination at the output,
absorbing reflections between the MAX3664 and its load.
The output emitter followers are designed to drive a
100Ω differential load between OUT+ and OUT-. They
can also drive higher output impedances, resulting in
increased gain and output voltage swing.
DC Cancellation Loop
The DC cancellation loop removes the DC component
of the input signal by using low-frequency feedback.
This feature centers the signal within the MAX3664’s
dynamic range, reducing pulse-width distortion on
large input signals.
The output of the paraphase amplifier is sensed through
resistors R3 and R4 and then filtered, amplified, and fed
back to the base of transistor Q4. The transistor draws
the DC component of the input signal away from the
transimpedance amplifier’s summing node.
The COMP pin sets the DC cancellation loop’s
response. Connect 400pF or more between COMP and
GND for normal operation. Connect the pin directly to
GND to disable the loop. The DC cancellation loop can
sink up to 300µA of current at the input. When operated
with CCOMP = 400pF, the loop takes approximately
20µs to stabilize.
The MAX3664 minimizes pulse-width distortion for data
sequences that exhibit a 50% duty cycle. A duty cycle
other than 50% causes the device to generate pulse-
width distortion.
DC cancellation current is drawn from the input and
adds noise. For low-level signals with little or no DC
component, this is not a problem. Preamplifier noise will
increase for signals with significant DC component.
___________Applications Information
The MAX3664 is a low-noise, wide-bandwidth transim-
pedance amplifier that is ideal for 622Mbps SDH/
SONET receivers. Its features allow easy design into a
fiber optic module, in four simple steps.
Step 1: Selecting a Preamplifier for a 622Mbps
Receiver
Fiber optic systems place requirements on the band-
width, gain, and noise of the transimpedance preampli-
fier. The MAX3664 optimizes these characteristics for
SDH/SONET receiver applications that operate at
622Mbps.
In general, the bandwidth of a fiber optic preamplifier
should be 0.6 to 1 times the data rate. Therefore, in a
622Mbps system, the bandwidth should be between
375MHz and 622MHz. Lower bandwidth causes pat-
tern-dependent jitter and a lower signal-to-noise ratio,
while higher bandwidth increases thermal noise. The
MAX3664 typical bandwidth is 590MHz, making it ideal
for 622Mbps applications.
The preamplifier’s transimpedance must be high
enough to ensure that expected input signals generate
output levels exceeding the sensitivity of the limiting
amplifier (quantizer) in the following stage. The
MAX3675 clock recovery and limiting amplifier IC has
an input sensitivity of 3.6mVp-p, which means that
3.6mVp-p is the minimum signal amplitude required to
produce a fully limited output. Therefore, when used
with the MAX3664, which has a 6kΩ transimpedance,
the minimum detectable photodetector current is 600nA.
It is common to relate peak-to-peak input signals to
average optical power. The relationship between opti-
cal input power and output current for a photodetector
is called the responsivity (ρ), with units Amperes/Watt
(A/W). The photodetector peak-to-peak current is relat-
ed to the peak-to-peak optical power as follows:
Ip-p = (Pp-p)(ρ)
Based on the assumption that SDH/SONET signals
maintain a 50% duty cycle, the following equations
relate peak-to-peak optical power to average optical
power and extinction ratio (Figure 2):
Average Optical Power = PAVE = (P0 + P1) / 2
Extinction Ratio = re = P1 / P0
Peak-to-Peak Signal Amplitude = Pp-p = P1 - P0
Therefore,
PAVE = Pp-p (1 / 2)[(re + 1) / (re - 1)]
_______________________________________________________________________________________ 5
5 Page 
622Mbps, Ultra-Low-Power, 3.3V
Transimpedance Preamplifier for SDH/SONET
________________________________________________________Package Information
______________________________________________________________________________________ 11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet MAX3664.PDF ] | |
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