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PDF MAX3455EETE Data sheet ( Hoja de datos )

Número de pieza MAX3455EETE
Descripción 15kV ESD-Protected USB Transceivers
Fabricantes Maxim Integrated 
Logotipo Maxim Integrated Logotipo



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No Preview Available ! MAX3455EETE Hoja de datos, Descripción, Manual

19-2924; Rev 1; 10/03
±15kV ESD-Protected USB Transceivers
General Description
The MAX3453E–MAX3456E ±15kV ESD-protected USB-
compliant transceivers interface low-voltage ASICs with
USB devices. The devices fully comply with USB 1.1
and USB 2.0 when operating at full (12Mbps) and low
(1.5Mbps) speeds. The MAX3453E–MAX3456E operate
with VL as low as +1.65V, ensuring compatibility with
low-voltage ASICs.
The MAX3453E–MAX3456E feature a logic-selectable
suspend mode that reduces current consumption to
less than 40µA. Integrated ±15kV ESD protection pro-
tects the USB D+ and D- bidirectional bus connections.
The MAX3453E supports only full-speed (12Mbps)
operation. The MAX3453E/MAX3454E feature an inter-
nal 1.5kUSB pullup resistor and an enumeration func-
tion that allows devices to logically disconnect while
plugged in. The MAX3453E/MAX3455E provide a push-
pull bus-detect (BD) output that asserts high when
VBUS > +4.0V. The MAX3456E is pin compatible with
Micrel’s MIC2550A.
The MAX3453E–MAX3456E operate over the extended
temperature range (-40°C to +85°C) and are available
in 14-pin TSSOP and 16-pin (3mm x 3mm) thin QFN
packages.
PDAs
PC Peripherals
Cellular Telephones
Data Cradles
MP3 Players
Applications
Features
o ±15kV ESD Protection on D+ and D-
o USB 1.1 and USB 2.0 (Low-Speed and Full-Speed)-
Compliant Transceivers
o Combined VP and VM Inputs/Outputs
o +1.65V to +3.6V VL Logic Supply Input for
Interfacing with Low-Voltage ASICs
o Enumerate Input Function (MAX3453E/MAX3454E)
o Powered from Li+ Battery as Low as +3.1V
(MAX3454E/MAX3456E)
o VBUS Detection (MAX3453E/MAX3455E)
o Pin Compatible with Micrel MIC2550A (MAX3456E)
o Internal Pullup Resistor (MAX3453E/MAX3454E)
o No Power-Supply Sequencing Required
PART
MAX3453EEUD
MAX3453EETE
MAX3454EEUD
MAX3454EETE
MAX3455EEUD
MAX3455EETE
MAX3456EEUD
MAX3456EETE
Ordering Information
TEMP RANGE
-40oC to +85oC
-40oC to +85oC
-40oC to +85oC
-40oC to +85oC
-40oC to +85oC
-40oC to +85oC
-40oC to +85oC
-40oC to +85oC
PIN-PACKAGE
14 TSSOP
16 Thin QFN
14 TSSOP
16 Thin QFN
14 TSSOP
16 Thin QFN
14 TSSOP
16 Thin QFN
PART
VBUS POWER-
SUPPLY
VOLTAGE (V)
MAX3453E
MAX3454E
MAX3455E
MAX3456E
4.0 to 5.5
3.0 to 5.5
4.0 to 5.5
3.0 to 5.5
VL POWER-
SUPPLY
VOLTAGE (V)
1.65 to 3.6
1.65 to 3.6
1.65 to 3.6
1.65 to 3.6
INTERNAL
PULLUP
RESISTOR
Yes
Yes
No
No
Selector Guide
VBUS LEVEL
DETECT
ENUMERATE
USB SPEED
SUPPORTED
±15kV ESD
PROTECTION
Yes Yes Full Yes
No Yes Low/full Yes
Yes
No
Low/full
Yes
No
No
Low/full
Yes
Typical Operating Circuit appears at end of data sheet.
Pin Configurations appear at end of data sheet.
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

1 page




MAX3455EETE pdf
±15kV ESD-Protected USB Transceivers
(VBUS = +5.0V, VL = +3.3V, TA = +25°C, unless otherwise noted.)
Typical Operating Characteristics
SINGLE-ENDED RECEIVER
PROPAGATION DELAY vs. VL
8
CL = 15pF
7
TA = +25°C
6 TA = +85°C
5
4
3 TA = -40°C
2
1
0
1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6
VL (V)
RISE-/FALL-TIME MATCHING
(FULL SPEED)
MAX3453E-56E toc02
CL = 50pF
RISE-/FALL-TIME MATCHING
(LOW SPEED)
MAX3453E-56E toc03
CL = 400pF
D+/D-
1V/div
D+/D-
1V/div
20ns/div
100ns/div
OE, VP, VM TIMING
MAX3453E-56E toc04
CL = 15pF
VP
2V/div
20ns/div
VM
2V/div
OE
5V/div
24
22
20
18
16
14
12
10
8
6
4
2
0
0
SUPPLY CURRENT
vs. D+/D- CAPACITANCE
SPD = VL, fIN = 6MHz
SPD = GND, fIN = 750kHz
50 100 150 200 250 300 350 400
D+/D- CAPACITANCE (pF)
LOGIC SUPPLY CURRENT
vs. D+/D- CAPACITANCE
500
450
400 SPD = VL, fIN = 6MHz
350
300
250
200
150
100
50
SPD = GND, fIN = 750kHz
0
0 50 100 150 200 250 300 350 400
D+/D- CAPACITANCE (pF)
_______________________________________________________________________________________ 5

5 Page





MAX3455EETE arduino
±15kV ESD-Protected USB Transceivers
Disable Mode
Connect VBUS to a system power supply and leave VL
unconnected or connect to GND. D+ and D- enter a tri-
state mode and VBUS (or VBUS and VTRM) consumes
less than 20µA of supply current. D+ and D- withstand
external signals up to +5.5V in disable mode (Table 2).
Sharing Mode
Connect VL to a system power supply and leave VBUS
(or VBUS and VTRM) unconnected or connect to GND.
D+ and D- enter a tri-state mode, allowing other circuitry
to share the USB D+ and D- lines, and VL consumes less
than 20µA of supply current. D+ and D- withstand
external signals up to +5.5V in sharing mode (Table 2).
Device Control
OE
OE controls the direction of communication. Drive OE
low to transfer data from the logic side to the USB side.
For OE = low, VP and VM serve as differential driver
inputs to the USB transmitter.
Drive OE high to transfer data from the USB side to the
logic side. For OE = high, VP and VM serve as single-
ended receiver outputs from the USB inputs
(D+ and D-). RCV serves as a differential receiver out-
put, regardless of the state of OE.
ENUM (MAX3453E/MAX3454E)
The MAX3453E/MAX3454E feature an enumerate func-
tion that allows software control of USB enumeration.
USB protocol requires a 1.5kpullup resistor to D+ or
D- to indicate the transmission speed to the host (see
the SPD section). The MAX3453E/MAX3454E provide
an internal 1.5kpullup resistor. Disconnect the pullup
resistor from the circuit to simulate the removal of a
device from the USB. Drive ENUM low to disconnect
the internal pullup resistor. Drive ENUM high to connect
the internal pullup resistor. The SPD state (MAX3454E
only) determines whether the pullup resistor connects
to D+ or D-. For ENUM = high, the internal pullup resis-
tor connects to D+ when SPD = VL (full speed) or to D-
when SPD = GND (low speed). The MAX3453E only
supports full-speed operation; therefore, the pullup
resistor only connects to D+ or is disconnected.
VOHD
tFR, tLR
90%
tFF, tLF
90%
10%
VOLD
Figure 1. Rise and Fall Times
10%
Table 3a. Transmit Truth Table
(OE = 0, SUS = 0)
INPUTS
VP VM
00
01
10
11
X = Undefined.
OUTPUTS
D+ D- RCV
00X
010
101
11X
OUTPUT STATE
SE0
Logic 0
Logic 1
Undefined
Table 3b. Transmit Truth Table
(OE = 0, SUS = 1)
INPUTS
VP VM
00
01
10
11
OUTPUTS
D+ D- RCV
000
010
100
110
OUTPUT STATE
SE0
Logic 0
Logic 1
Undefined
Table 4a. Receive Truth Table
(OE = 1 and SUS = 0)
INPUTS
D+ D-
00
01
10
11
OUTPUTS
VP VM RCV
00X
010
101
11X
OUTPUT STATE
SE0
Logic 0
Logic 1
Undefined
X = Undefined.
Table 4b. Receive Truth Table
(OE = 1 and SUS = 1)
INPUTS
D+ D-
00
01
10
11
OUTPUTS
VP VM RCV
000
010
100
110
OUTPUT STATE
SE0
Logic 0
Logic 1
Undefined
______________________________________________________________________________________ 11

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