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PDF DS1232LP Data sheet ( Hoja de datos )

Número de pieza DS1232LP
Descripción Low Power MicroMonitor Chip
Fabricantes Dallas 
Logotipo Dallas Logotipo



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DS1232LP/LPS
Low Power MicroMonitor Chip
FEATURES
Super-low power version of DS1232
50 µA quiescent current
Halts and restarts an out-of-control
microprocessor
Automatically restarts microprocessor after
power failure
Monitors pushbutton for external override
Accurate 5% or 10% microprocessor power
supply monitoring
8-pin DIP, 8-pin SOIC or space saving µ-SOP
package available
Optional 16-pin SOIC package available
Industrial temperature -40°C to +85°C
available, designated N
PIN ASSIGNMENT
PBRST 1
8 VCC
NC
TD 2
TOL 3
7 ST
PBRST
NC
6 RST
TD
GND 4
5 RST
DS1232LP 8-Pin DIP (300-mil)
See Mech. Drawings Section
NC
TOL
NC
GND
1 16
2 15
3 14
4 13
5 12
6 11
7 10
89
NC
VCC
NC
ST
NC
RST
NC
RST
DS1232LPS 16-Pin SOIC (300-mil)
See Mech. Drawings Section
PBRST 1 8 VCC
TD 2 7 ST
TOL 3 6 RST
GND 4 5 RST
DS1232LPµ (118-mil µ-SOP)
See Mech. Drawings Section
PBRST
TD
TOL
GND
18
27
36
45
VCC
ST
RST
RST
DS1232LPS-2 8-Pin SOIC (150-mil)
See Mech. Drawings Section
PIN DESCRIPTION
PBRST
TD
TOL
GND
RST
- Pushbutton Reset Input
- Time Delay Set
- Selects 5% or 10% VCC Detect
- Ground
- Reset Output (Active High)
RST - Reset Output (Active Low, open
drain)
ST - Strobe Input
VCC - +5 Volt Power
DESCRIPTION
The DS1232LP/LPS Low Power MicroMonitor Chip monitors three vital conditions for a
microprocessor: power supply, software execution, and external over-ride. First, a precision temperature-
compensated reference and comparator circuit monitors the status of VCC. When an out-of-tolerance
condition occurs, an internal power-fail signal is generated which forces reset to the active state. When
VCC returns to an in-tolerance condition, the reset signals are kept in the active state for a minimum of
250 ms to allow the power supply and processor to stabilize.
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DS1232LP pdf
TIMING DIAGRAM: POWER-DOWN Figure 5
DS1232LP/LPS
TIMING DIAGRAM: POWER-UP Figure 6
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