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PDF DG3157DL Data sheet ( Hoja de datos )
| Número de pieza | DG3157DL | |
| Descripción | High-Speed / Low rON / SPDT Analog Switch (2:1 Multiplexer/Demultiplexer Bus Switch) | |
| Fabricantes | Vishay Siliconix | |
| Logotipo |  |
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DG3157
Vishay Siliconix
High-Speed, Low rON, SPDT Analog Switch
(2:1 Multiplexer/Demultiplexer Bus Switch)
FEATURES
D Direct Cross to Industry Standard SN74LVC1G3157
NC7SB3157, NLASB3175, Pl5A3157, and STG3157
D SC-70 6-Lead Package
D 1.65-V to 5.5-V VCC Operation
D 5-W Connection Between Ports
D Minimal Propagation Delay
D Break-Before-Make Switching
D Zero Bounce In Flow-Through Mode
DESCRIPTION
The DG3157 is a high-speed single-pole double-throw, low
power, TTL-Compatible bus switch. Using sub-micro CMOS
technology, the DG3157 achieves low on-resistance and
negligible propagation delay.
The DG3157 can handle both analog and digital signals and
permits signals with amplitudes of up to VCC to be transmitted
in either direction.
When the Select pin is low, B0 is connected to the output A pin.
When the Select pin is high, B1 is connected to the output A
pin. The path that is open will have a high-impedance state
with respect to the output. Make-before-break is guaranteed.
An eptiaxial layer prevents latch-up.
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
SC-70
6- Pin
B1
GND
B0
1
2
3
6S
5 V+
4A
Top View
Device Marking: G1
TRUTH TABLE
Logic Input (S)
Function
0 B0 Connected to A
1 B1 Connected to A
ORDERING INFORMATION
Temp Range
-40 to 85°C
Package
SC70-6
Part Number
DG3157DL
Document Number: 72648
S-32552—Rev. A, 15-Dec-03
www.vishay.com
1
1 page  
AC LOADING AND WAVEFORMS
New Product
From Output
Under Test
CL
50 pF
RL
500 W
RL
500 W
VLD
SW Open
GND
Load Circuit
Figure 2. AC Test Circuit
DG3157
Vishay Siliconix
TEST
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
SW
Open
VLD
GND
tr = 2.5 ns
Switch
Input
10%
Output
90%
1.5 V
90%
1.5 V
tPLH
tw
1.5 V
tf = 2.5 ns
tf = 2.5 ns
3.0 V
90%
Logic
Input
1.5 V
10%
tPHL
GND
VOH
1.5 V
Output
Waveform 1
SW at VLD
10%
tPZL
10%
1.5 V
tPZH
VOL
Output
Waveform 2
SW at GND
1.5 V
tr = 2.5 ns
90%
3.0 V
1.5 V
GND
tPLZ
VLD
2
VOL + 0.3 V
VOL
tPHZ
VOH
VOH −0.3 V
0V
Propagation Delay Times
Enable and Disable Time—Low- and High-Level Enabling
Figure 3. AC Waveforms
Notes:
a. CL includes probe and jig capacitance.
b. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
c. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
d. All input pulses are supplied by generators having the following characteristics: PRR v 10 MHz, ZO = 50 W.
e. The outputs are measured one at a time with one transition per measurement.
f. tPLZ and tPHZ are the same as tdis.
g. tPZL and tPZH are the same as tdis.
h. tPLH and tPHL are the same as tdis.
i. VLD = 2 V+.
Document Number: 72648
S-32552—Rev. A, 15-Dec-03
www.vishay.com
5
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet DG3157DL.PDF ] | |
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