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PDF KM684000C Data sheet ( Hoja de datos )
| Número de pieza | KM684000C | |
| Descripción | 512Kx8 bit Low Power CMOS Static RAM | |
| Fabricantes | Samsung | |
| Logotipo |  |
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KM684000C Family
Document Title
512Kx8 bit Low Power CMOS Static RAM
Revision History
Revision No. History
0.0 Initial draft
1.0 Finalize
CMOS SRAM
Draft Date
October 20,1998
April 12, 1999
Remark
Preliminary
Final
The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications and
products. SAMSUNG Electronics will answer to your questions about device. If you have any questions, please contact the SAMSUNG branch offices.
1 Revision 1.0
April 1999
1 page  
KM684000C Family
AC OPERATING CONDITIONS
TEST CONDITIONS (Test Load and Test Input/Output Reference)
Input pulse level : 0.8 to 2.4V
Input rising and falling time : 5ns
Input and output reference voltage : 1.5V
Output load (See right) :CL=100pF+1TTL
CL=50pF+1TTL
CMOS SRAM
CL1)
1. Including scope and jig capacitance
AC CHARACTERISTICS (Vcc=4.5~5.5V, KM684000C Family:TA=0 to 70°C, KM684000CI Family:TA=-40 to 85°C)
Parameter List
Read
Write
Read cycle time
Address access time
Chip select to output
Output enable to valid output
Chip select to low-Z output
Output enable to low-Z output
Chip disable to high-Z output
Output disable to high-Z output
Output hold from address change
Write cycle time
Chip select to end of write
Address set-up time
Address valid to end of write
Write pulse width
Write recovery time
Write to output high-Z
Data to write time overlap
Data hold from write time
End write to output low-Z
Symbol
tRC
tAA
tCO
tOE
tLZ
tOLZ
tHZ
tOHZ
tOH
tWC
tCW
tAS
tAW
tWP
tWR
tWHZ
tDW
tDH
tOW
Speed Bins
55ns
70ns
Min Max Min Max
55 - 70 -
- 55 - 70
- 55 - 70
- 25 - 35
10 - 10 -
5-5 -
0 20 0 25
0 20 0 25
10 - 10 -
55 - 70 -
45 - 60 -
0-0 -
45 - 60 -
40 - 50 -
0-0 -
0 20 0 25
25 - 30 -
0-0 -
5-5 -
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DATA RETENTION CHARACTERISTICS
Item
Vcc for data retention
Data retention current
Data retention set-up time
Recovery time
Symbol
Test Condition
VDR CS≥Vcc-0.2V
KM684000CL
IDR Vcc=3.0V, CS≥Vcc-0.2V KM684000CL-L
KM684000CLI
KM684000CLI-L
tSDR
tRDR
See data retention waveform
Min
2.0
-
-
-
-
0
5
Typ Max Unit
- 5.5 V
- 40
- 15 µA
- 50
- 20
--
ms
--
5 Revision 1.0
April 1999
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet KM684000C.PDF ] | |
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