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74F825SPC fiches techniques PDF

Fairchild - 8-Bit D-Type Flip-Flop

Numéro de référence 74F825SPC
Description 8-Bit D-Type Flip-Flop
Fabricant Fairchild 
Logo Fairchild 





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74F825SPC fiche technique
April 1988
Revised August 1999
74F825
8-Bit D-Type Flip-Flop
General Description
The 74F825 is an 8-bit buffered register. It has Clock
Enable and Clear features which are ideal for parity bus
interfacing in high performance microprogramming sys-
tems. Also included in the 74F825 are multiple enables that
allow multi-user control of the interface.
Features
s 3-STATE output
s Clock enable and clear
s Multiple output enables
Ordering Code:
Order Number Package Number
Package Description
74F825SC
M24B
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74F825SPC
N24C
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
© 1999 Fairchild Semiconductor Corporation DS009597
www.fairchildsemi.com

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