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PDF 74F823SPC Data sheet ( Hoja de datos )
| Número de pieza | 74F823SPC | |
| Descripción | 9-Bit D-Type Flip-Flop | |
| Fabricantes | National | |
| Logotipo |  |
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December 1994
54F 74F823
9-Bit D-Type Flip-Flop
General Description
The ’F823 is a 9-bit buffered register It features Clock En-
able and Clear which are ideal for parity bus interfacing in
high performance microprogramming systems
The ’F823 is functionally and pin compatible with AMD’s
Am29823
Features
Y TRI-STATE outputs
Y Clock Enable and Clear
Y Direct replacement for AMD’s Am29823
Commercial
Military
Package
Number
Package Description
74F823SPC
N24C
24-Lead (0 300 Wide) Molded Dual-In-Line
54F823SDM (Note 2) J24F
24-Lead (0 300 Wide) Ceramic Dual-In-Line
74F823SC (Note 1)
M24B
24-Lead (0 300 Wide) Molded Small Outline JEDEC
54F823FM (Note 2)
W24C 24-Lead Cerpack
54F823LM (Note 2)
E28A
24-Lead Ceramic Chip Carrier Type C
Note 1 Devices also available in 13 reel Use suffix e SCX
Note 2 Military grade device with environmental and burn-in processing Use suffix e SDMQB FMQB and LMQB
Logic Symbols
Connection Diagrams
Pin Assignment for
DIP SOIC and Flatpak
Pin Assignment
for LCC
TL F 9596–2
IEEE IEC
TL F 9596 – 3
TL F 9596 – 4
TL F 9596–1
TRI-STATE is a registered trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 9596
RRD-B30M75 Printed in U S A
1 page  
AC Electrical Characteristics
Symbol
Parameter
fmax
tPLH
tPHL
tPHL
tPZH
tPZL
tPHZ
tPLZ
Maximum Clock Frequency
Propagation Delay
CP to On
Propagation Delay
CLR to On
Output Enable Time
OE to On
Output Disable Time
OE to On
74F
TA e a25 C
VCC e a5 0V
CL e 50 pF
Min Typ Max
100 160
20 56 95
20 52 95
4 0 7 1 12 0
2 0 5 8 10 5
2 0 5 5 10 5
15 29 70
15 27 70
54F
TA VCC e Mil
CL e 50 pF
Min Max
60
2 0 10 5
2 0 10 5
4 0 13 0
2 0 13 0
2 0 13 0
10 75
10 75
74F
TA VCC e Com
CL e 50 pF
Min Max
70
2 0 10 5
2 0 10 5
4 0 13 0
2 0 11 5
2 0 11 5
15 75
15 75
Units
MHz
ns
ns
ns
AC Operating Requirements
Symbol
Parameter
ts(H)
ts(L)
th(H)
th(L)
ts(H)
ts(L)
th(H)
th(L)
tw(H)
tw(L)
tw(L)
trec
Setup Time HIGH or LOW
Dn to CP
Hold Time HIGH or LOW
Dn to CP
Setup Time HIGH or LOW
EN to CP
Hold Time HIGH or LOW
EN to CP
CP Pulse Width
HIGH or LOW
CLR Pulse Width LOW
CLR Recovery Time
74F
TA e a25 C
VCC e a5 0V
Min Max
25
25
25
25
45
25
20
0
50
50
50
50
54F
TA VCC e Mil
Min Max
40
40
25
25
50
30
30
10
60
60
50
50
74F
TA VCC e Com
Min Max
30
30
25
25
50
30
20
0
60
60
50
50
Units
ns
ns
ns
ns
ns
Ordering Information
The device number is used to form part of a simplified purchasing code where the package type and temperature range are
defined as follows
74F 823 S C X
Temperature Range Family
74FeCommercial
54FeMilitary
Device Type
Package Code
SP e Slim Plastic DIP
SD e Slim Ceramic DIP
F e Flatpak
L e Leadless Chip Carrier (LCC)
S e Small Outline (SOIC)
Special Variations
QB e Military grade device with
environmental and burn-in
processing
Temperature Range
C e Commercial (0 C to a70 C)
M e Military (b55 C to a125 C)
5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet 74F823SPC.PDF ] | |
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