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PDF 74F398 Data sheet ( Hoja de datos )

Número de pieza 74F398
Descripción Quad 2-Port Register
Fabricantes National 
Logotipo National Logotipo



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No Preview Available ! 74F398 Hoja de datos, Descripción, Manual

May 1995
54F 74F398  54F 74F399
Quad 2-Port Register
General Description
The ’F398 and ’F399 are the logical equivalents of a quad
2-input multiplexer feeding into four edge-triggered flip-
flops A common Select input determines which of the two
4-bit words is accepted The selected data enters the flip-
flops on the rising edge of the clock The ’F399 is the 16-pin
version of the ’F398 with only the Q outputs of the flip-flops
available
Features
Y Select inputs from two data sources
Y Fully positive edge-triggered operation
Y Both true and complement outputs ’F398
Y Guaranteed 4000V minimum ESD protection
’F399
Commercial
74F398PC
74F398SC (Note 1)
74F399PC
74F399SC (Note 1)
74F399SJ (Note 1)
Military
54F398DM (Note 2)
54F398FM (Note 2)
54F398LM (Note 2)
54F399DM (Note 2)
54F399FM (Note 2)
54F399LM (Note 2)
Package
Number
N20A
J20A
M20B
W20A
E20A
N20A
J20A
M20B
M20D
W20A
E20A
Package Description
20-Lead (0 300 Wide) Molded Dual-In-Line
20-Lead Ceramic Dual-In-Line
20-Lead (0 300 Wide) Molded Small Outline JEDEC
20-Lead Cerpack
20-Lead Ceramic Leadless Chip Carrier Type C
20-Lead (0 300 Wide) Molded Dual-In-Line
20-Lead Ceramic Dual-In-Line
20-Lead (0 300 Wide) Molded Small Outline JEDEC
20-Lead (0 300 Wide) Molded Small Outline EIAJ
20-Lead Cerpack
20-Lead Ceramic Leadless Chip Carrier Type C
Note 1 Devices also available in 13 reel Use suffix e SCX and SJX
Note 2 Military grade device with environmental and burn-in processing Use suffix e DMQB FMQB and LMQB
Connection Diagrams
Pin Assignment
for LCC
’F398
Pin Assignment
for DIP SOIC and Flatpak
TL F 9533 – 5
TRI-STATE is a registered trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 9533
TL F 9533 – 6
RRD-B30M75 Printed in U S A

1 page




74F398 pdf
AC Electrical Characteristics
Symbol
Parameter
fmax Input Clock Frequency
tPLH
tPHL
Propagation Delay
CP to Q or Q
’F398 3 3 ns
74F
TA e a25 C
VCC e a5 0V
CL e 50 pF
Min Typ Max
100 140
30 57 75
30 68 90
54F
TA VCC e Mil
CL e 50 pF
Min Max
80
30 95
3 0 11 5
AC Operating Requirements
Symbol
Parameter
ts(H)
ts(L)
th(H)
th(L)
ts(H)
ts(L)
ts(H)
ts(L)
th(H)
th(L)
tw(H)
tw(L)
Setup Time HIGH or LOW
In to CP
Hold Time HIGH or LOW
In to CP
Setup Time HIGH or LOW
S to CP (’F398)
Setup Time HIGH or LOW
S to CP (’F399)
Hold Time HIGH or LOW
S to CP
CP Pulse Width
HIGH or LOW
74F
TA e a25 C
VCC e a5 0V
Min Max
30
30
10
10
75
75
75
75
0
0
40
50
54F
TA VCC e Mil
Min
45
45
15
15
10 5
10 5
95
95
0
0
40
70
Max
74F
TA VCC e Com
CL e 50 pF
Min Max
100
30 85
3 0 10 0
Units
MHz
ns
74F
TA VCC e Com
Min Max
30
30
10
10
85
85
85
85
0
0
40
50
Units
ns
ns
ns
5

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