|
|
PDF DS3154 Data sheet ( Hoja de datos )
| Número de pieza | DS3154 | |
| Descripción | Single/Dual/Triple/Quad DS3/E3/STS-1 LIUs | |
| Fabricantes | Dallas | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de DS3154 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
DEMO KIT AVAILABLE
www.maxim-ic.com
DS3151/DS3152/DS3153/DS3154
Single/Dual/Triple/Quad
DS3/E3/STS-1 LIUs
GENERAL DESCRIPTION
The DS3151 (single), DS3152 (dual), DS3153
(triple), and DS3154 (quad) line interface units (LIUs)
perform the functions necessary for interfacing at the
physical layer to DS3, E3, or STS-1 lines. Each LIU
has independent receive and transmit paths and a
built-in jitter attenuator.
APPLICATIONS
SONET/SDH and PDH Multiplexers
Digital Cross-Connects
Access Concentrators
ATM and Frame Relay Equipment
Routers
PBXs
DSLAMs
CSUs/DSUs
FUNCTIONAL DIAGRAM
LINE IN
DS3, E3,
OR STS-1
EACH LIU
RXP
RXN
CLK
DATA
Dallas
Semiconductor
DS315x
LINE OUT
DS3, E3,
OR STS-1
TXP
TXN
CLK
DATA
RECEIVE
CLOCK
AND DATA
CONTROL
STATUS
TRANSMIT
CLOCK
AND DATA
FEATURES
Single, Dual, Triple, or Quad Integrated
Transmitter, Receiver, and Jitter Attenuators for
DS3, E3, and STS-1
Each Port Independently Configurable
Perform Receive Clock/Data Recovery and
Transmit Waveshaping
Hardware or CPU Bus Configuration Options
Jitter Attenuators can be Placed in Either the
Receive or Transmit Paths
Interface to 75Ω Coaxial Cable at Lengths Up to
380m (DS3), 440m (E3), or 360m (STS-1)
Use 1:2 Transformers on Tx and Rx
Require Minimal External Components
Local and Remote Loopbacks
Low-Power 3.3V Operation (5V Tolerant I/O)
Industrial Temperature Range: -40°C to +85°C
Small Package: 144-Pin, 13mm x 13mm
Thermally Enhanced CSBGA
IEEE 1149.1 JTAG Support
Features continued on page 5.
ORDERING INFORMATION
PART
DS3151
DS3151N
DS3152
DS3152N
DS3153
DS3153N
DS3154
DS3154N
LIUs
1
1
2
2
3
3
4
4
TEMP RANGE
0°C to +70°C
-40°C to +85°C
0°C to +70°C
-40°C to +85°C
0°C to +70°C
-40°C to +85°C
0°C to +70°C
-40°C to +85°C
PIN-PACKAGE
144 TE-CSBGA
144 TE-CSBGA
144 TE-CSBGA
144 TE-CSBGA
144 TE-CSBGA
144 TE-CSBGA
144 TE-CSBGA
144 TE-CSBGA
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device
may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.
1 of 61
REV: 030607
1 page  
DS3151/DS3152/DS3153/DS3154 Single/Dual/Triple/Quad DS3/E3/STS-1 LIUs
FEATURES (continued)
Receiver
AGC/equalizer block handles from 0 to 15dB of cable loss
Loss-of-lock (LOL) PLL status indication
Interfaces directly to a DSX monitor signal (~20dB flat loss) using built-in preamp
Digital and analog loss-of-signal (LOS) detectors (ANSI T1.231 and ITU G.775)
Optional B3ZS/HDB3 decoder
Line-code violation output pin and counter
Binary or bipolar framer interface
On-board 215 - 1 and 223 - 1 PRBS detector
Clock inversion for glueless interfacing
Tri-state clock and data outputs support protection switching applications
Per-channel power-down control
Transmitter
Binary or bipolar framer interface
Gapped clock capable up to 51.84MHz
Wide 50 ±20% transmit clock duty cycle
Clock inversion for glueless interfacing
Optional B3ZS/HDB3 encoder
On-board 215 - 1 and 223 - 1 PRBS generator
Complete DS3 AIS generator (ANSI T1.107)
Unframed all-ones generator (E3 AIS)
Line build-out (LBO) control
Tri-state line driver outputs support protection switching applications
Per-channel power-down control
Output driver monitor
1. DETAILED DESCRIPTION
The DS3151 (single), DS3152 (dual), DS3153 (triple), and DS3154 (quad) LIUs perform the functions necessary
for interfacing at the physical layer to DS3, E3, or STS-1 lines. Each LIU has independent receive and transmit
paths and a built-in jitter attenuator. The receiver performs clock and data recovery from a B3ZS- or HDB3-coded
alternate mark inversion (AMI) signal and monitors for loss of the incoming signal. The receiver optionally performs
B3ZS/HDB3 decoding and outputs the recovered data in either binary or bipolar format. The transmitter accepts
data in either binary or bipolar format, optionally performs B3ZS/HDB3 encoding, and drives standard pulse-shape
waveforms onto 75Ω coaxial cable. The jitter attenuator can be mapped into the receiver data path, mapped into
the transmitter data path, or be disabled. The DS315x LIUs conform to the telecommunications standards listed in
Table 1-A. Figure 1-1 shows the external components required for proper operation.
5 of 61
5 Page 
DS3151/DS3152/DS3153/DS3154 Single/Dual/Triple/Quad DS3/E3/STS-1 LIUs
Table 4-B. Transmitter Pin Descriptions
NAME
TCLKn
TPOSn/
TDATn
TNEGn
TXPn,
TXNn
TTSn
TDMn
TDSAn,
TDSBn
TLBOn
TJAn
I/O FUNCTION
Transmitter Clock. A DS3 (44.736MHz ±20ppm), E3 (34.368MHz ±20ppm), or STS-1 (51.840MHz
I
±20ppm) clock should be applied at this signal. Data to be transmitted is clocked into the device at
TPOS/TDAT and TNEG either on the rising edge of TCLK (TCINV = 0) or the falling edge of TCLK
(TCINV = 1). See Section 7 for additional details.
Transmitter Positive AMI/Transmitter Data. When the transmitter is configured to have a bipolar
interface (TBIN = 0), a positive pulse is transmitted on the line when TPOS is high. When the
I transmitter is configured to have a binary interface (TBIN = 1), the data on TDAT is transmitted after
B3ZS or HDB3 encoding. TPOS/TDAT is sampled either on the rising edge of TCLK (TCINV = 0) or
on the falling edge of TCLK (TCINV = 1).
Transmitter Negative AMI. When the transmitter is configured to have a bipolar interface (TBIN = 0), a
I
negative pulse is transmitted on the line when TNEG is high. When the transmitter is configured to
have a binary interface (TBIN = 1), TNEG is ignored and should be wired either high or low. TNEG is
sampled either on the rising edge of TCLK (TCINV = 0) or on the falling edge of TCLK (TCINV = 1).
Transmitter Analog Outputs. These differential AMI outputs are coupled to the outbound 75Ω coaxial
O3 cable through a 2:1 step-down transformer (Figure 1-1). These outputs can be tri-stated using the TTS
pin or the TTS or TPS configuration bits.
Transmitter Tri-State Enable (Active Low). TTS tri-states the transmitter outputs (TXP and TXN). This
feature supports applications requiring LIU redundancy. Transmitter outputs from multiple LIUs can be
I
wire-ORed together, eliminating external switches. The transmitter continues to operate internally
when TTS is active.
0 = tri-state the transmitter output driver
1 = enable the transmitter output driver
Transmitter Driver Monitor (Active Low, Open Drain). TDM reports the status of the transmit driver
O monitor. When the transmit driver monitor detects a faulty transmitter, TDM is driven low. TDM
requires an external pullup to VDD.
I Transmitter Data Select. These inputs select the source of the transmit data. See Table 4-F for details.
Transmitter Line Build-Out Enable. TLBO indicates cable length for waveform shaping in DS3 and
I
STS-1 modes. TLBO is ignored for E3 mode and should be wired high or low.
0 = cable length ≥ 225ft
1 = cable length < 225ft
Transmitter Jitter Attenuator Enable
I
0 = remove jitter attenuator from the transmitter path
1 = insert jitter attenuator into the transmitter path
(Note that TJA = 1 takes precedence over RJA = 1.)
11 of 61
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet DS3154.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| DS3151 | Single/Dual/Triple/Quad DS3/E3/STS-1 LIUs |  Maxim Integrated |
| DS3152 | Single/Dual/Triple/Quad DS3/E3/STS-1 LIUs | Maxim Integrated |
| DS3153 | Single/Dual/Triple/Quad DS3/E3/STS-1 LIUs | Maxim Integrated |
| DS3154 | Single/Dual/Triple/Quad DS3/E3/STS-1 LIUs | Dallas |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |