PDF F65550B Data sheet ( Hoja de datos )

Número de pieza	F65550B
Descripción	VL-Bus / etc
Fabricantes	Digital
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No Preview Available ! clocks sdctl cpu clocks SDRAM sdctl cpu sheet 2, sdram and address and data buffers sequoia sequoia sequoia romcard CPUPAL sequoia romcard sheet 1, CPU, PAL and 3.3V to 5V buffers sdctl cpu vl clocks isa sdctl cpu vl clocks isa sequoia clocks sequoia VIDEO clocks vl sheet 3, Video controller, VGA and LCD outputs tv tv tv TVOUT sequoia clocks sequoia clocks sheet 4, TV output encoder and filter romcard sequoia CLOCKS vl clocks sheet 5, clock generation and ROM card interface clocks clocks clocks SEQUOIA vl sequoia sheet 6, SEQUOIA core logic, boot rom and IDE interface isa sequoia clocks PCIUMI vl sequoia clocks isa sheet 7, PCI bridge, UMI1 and UMI0 isa AUDIO clocks clocks isa sheet 10, audio (mike in, headphone out) and gameport SUPERIO ser1t ser1shdn ser2t isa clocks vBat ir sheet 8, super I/O, keyboard/mouse and parallel ports sequoia ser1t ser1shdn ser2t clocks ir sequoia POWER vBat pBat rcRst Makes p5000, p3300 and p2000* pwrgood Sheet 12, power supply and backup battery vBat sequoia.pBat sequoia.rcrst sequoia.pwrgood isa vl sequoia Ether isa vl sequoia sheet 11, Ethernet ser1t ser1shdn ser2t clocks ir SERIAL sheet 9, RS232 interface and IR interface sequoia Sheets 13 to 16 show the bypass capacitors and are included as required by the other sheets Title: NC Reference Design By: Mark Hayter $Date: 1997/04/30 09:20:59 $ RCS $Revision: 1.19 $ Version: Rev 4 Systems Research Center Palo Alto, CA 1 page tv .r c8:0.1uF vr Ch .g c9:0.1uF vg Ch .b c10:0.1uF vb Ch .h .v sequoia.pc[3] f4 NTSC clocks.clk14m p5000 p5000* p5000* AD724 6 rin 7 gin cmps 10 vo 8 bin 16 hsync luma 11 vy 15 vsync 5 encd 12 select crma 9 1 stnd 3 fin vc 14 dpos apos 4 gnd* c4:10uF Cva4 c5:0.1uF Cv 13 dgnd agnd 2 r1:75R Rh c1:220uF or oc Cha8 r2:75R Rh c2:220uF yr yc Cha8 r3:75R Rh c3:220uF cr cc Cha8 p5000* c6:0.1uF Cv c7:10uF Cva4 gnd* i1: Fb i2: Fb i3: Fb compout RCA yout DIN4 cout 43 21 Title: TV out 4 of 16 By: Mark Hayter $Date: 1997/04/30 09:20:59 $ RCS $Revision: 1.10 $ Version: Rev 4 Systems Research Center Palo Alto, CA 5 Page The audio is designed to use either the ES888 or ES1887 codec The main difference is that the 1887 includes FM synth, it is also more expensive (about $3 more) The 1887 is also slightly more configurable Software for the 888 should work with the 1887 apart from a few lines of setup code (and the lack of synth) isa Note: Use xtal here if the clk14m is not accurate enough p5000* i1:1K Rh Note: four 0.1uF bypass capacitors (as suggested by ESS) shown on sheet 11 :’ES888 or ES1887’ ES888 .reset .~ior .~iow .sa[0..11] .aen 78 reset 72 iorb 73 iowb [] adr 9 a[0e..n11] msi 56 mi mso 55 mo i14:2K2 i15:2K2 p5000* i16:2K2 i11:2K2 Rhr i12:2K2 Rh i17:2K2 i13: Fb25 pg PTC miout moout pGame i18:150pF .sd[0..7] [] datal Cv .sd[8..15] [0..7] [] datah Rvi Rvi Rvi Rvi [8..15] swa 32 sa nc* 76 xo swb 31 sb clocks.clk14m 77 xi swc 30 sc swd 29 sd .irq[9] 71 irqa i19:0.01uF i20:0.01uF i21:0.01uF i22:0.01uF .irq[5] .irq[7] .irq[10] .irq[15] .drq[0] 70 irqb 69 irqc 68 irqd 67 irqe 65 drqa Cv ta 28 ta tb 27 tb tc 26 tc td 25 td i27:1M Cv gnd* Cv Cv i29:1M i31:1M i33:1M i23:2K2 i24:2KR2hi Rhi i25:2K2 Rhi i26:2K2 Rhi x1 y1 x2 y2 .~dack[0] 66 dackba i28:0.01uF i30:0.01uF i32:0.01uF i34:0.01uF .drq[1] 63 drqb Rvi Cv Rvi Cv Rvi Cv Rvi Cv .~dack[1] .drq[3] 64 dackbb 61 drqc fmcsb 18 nc* gnd* .~dack[3] 62 dackbc frmstb 79 nc* .drq[5] 59 drqd fs 80 nc* Note: Slight difference between The frmsrb out from the 888 becomes fsr in on the 1887 .~dack[5] 60 dackbd dclk 81 nc* 888 and 1887 for the DSP serial The fs in on the 888 becomes fsx in on the 1887 dr 82 nc* port. This arrangement should For using the port on both chips these would have to amode 22 amode dx 83 nc* be fine for not using the port be linked in the 1887 case and not in the 888 case. gnd* 52 pcspki fmsel 86 fmsel i35:4K7 Rhr gnd* For never using leave unlinked and rely on the internal pulldowns 15 12 1 8 9 2 7 10 14 3 6 11 13 5 4 Note: Care with layout Need single connection point for agnd to gnd Mike input is on combo connector on right of this page nc* 19 voldn nc* 20 volup nc* 21 mute Below this line is the analog power/ground domain p5000* i2: avcc Fb25 i3:10uF i4:0.1uF i53:0.22uF agnd Cva4 Cv i54:0.22uF Ch 41 i0 46 i1 47 miin i6:7K5 Rhr Note: rev 4 change tie off unused inputs i5:0.1uF agnd Ch i7:7K5 Rhr avcc Ch i55:0.22uF i56:0.22uF Ch i2 37 i3 38 Ch i57:0.22uF i58:0.22uF Ch i4 36 i5 35 Ch mic 39 cmr 45 40 avccm vdda1 linel liner auxl auxr fdxo fdxi mic cmr gnda i8:10uF Cva4 i9:47uF Cva6 i10:0.1uF Cv msd mclk 84 85 nc* nc* gpo0 gpo1 54 53 nc* nc* Below this line is the analog power/ground domain vref 44 vref i36:0.1uF Ch foutl 33 fl i37:0.22uF i38:1000pF Ch Ch cinl 42 cil foutr 34 fr i39:0.22uF Ch cinr 43 cir i40:1000pF Ch Note: output amp is directly (not cap) coupled since vref/cmr is used as the reference i41:10uF avcc i42:0.1uF Cva4 Cv pcspko 50 nc* aoutr 49 i51:0.22uF rl Ch aor aoutl 48 i52:0.22uF Ch ll aol i44:10K Rh i46:10K Rh cmr aord i45:8K6 Rhi i47:8K6 Rhi cmr Had 10uF here aold i50:0.1uF +3 p1 -2 m1 vcc 8 o1 1 SSM2135 +5 p2 -6 m2 7 o2 vee 4 ramp lamp nc* 302 nc* 310 miin 303 311 agnd 301 i43:330uF Cha8 rl 202 nc* 210 ll 203 nc* 211 agnd 201 i48:330uF Cha8 ro 102 nc* 110 lo 103 nc* 111 AudioGm GamePort midii midio pwr1 pwr2 pwr3 sw1 sw2 sw3 sw4 x1 y1 x2 y2 gnd1 gnd2 15 pin (2 row) female D over three 3.5mm jacks Right Jack rsig3 rsw3 lsig3 lsw3 com3 Center Jack rsig2 rsw2 lsig2 lsw2 com2 Left Jack rsig1 rsw1 lsig1 lsw1 agnd Cv 101 com1 Mono mike input Stereo line output Stereo headphone output Title: Audio 10 of 16 By: Mark Hayter $Date: 1997/05/17 00:51:49 $ RCS $Revision: 1.32 $ Version: Rev 4 Systems Research Center Palo Alto, CA 11 Page

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