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PDF SAA2510 Data sheet ( Hoja de datos )
| Número de pieza | SAA2510 | |
| Descripción | Video CD VCD decoder | |
| Fabricantes | Philips | |
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INTEGRATED CIRCUITS
DATA SHEET
SAA2510
Video CD (VCD) decoder
Preliminary specification
File under Integrated Circuits, IC02
1996 May 21
1 page  
Philips Semiconductors
Video CD (VCD) decoder
Preliminary specification
SAA2510
PINNING
SYMBOL
UV6
UV5
UV4
UV3
UV2
UV1
UV0
VDD5
CSYNC
VSS5
TLSAND
EBUOUT
DAOUT
WSOUT
VDD3
CLOUT
VSS
AUDIOCLK
VDD5
EBUIN
CLIN
WSIN
DAIN
VDD3
EFIN
VSS
RESET
DRAMON
INT
NDAV
ASEL
SDA
VDD5
SCL
VSS5
DR15
1996 May 21
PIN DESCRIPTION
1 video UV bus output bit 6;
16-bit video output mode: the UV bus outputs alternating U and V chroma samples
at 13.5 Mbytes/s
CCIR656 mode: this bus is not used (inactive)
2 video UV bus bit 5
3 video UV bus bit 4
4 video UV bus bit 3
5 video UV bus bit 2
6 video UV bus bit 1
7 video UV bus bit 0
8 5 V external pad power supply
9 composite sync output; 525 lines/60 Hz or 625 lines/50 Hz
10 0 V external pad power supply
11 two-level Sandcastle (composite blanking) output; requires external resistor network
to define horizontal/vertical blanking level
12 IEC 958 digital audio output
13 I2S data; digital audio output
14 I2S word select digital audio output
15 +3 V internal power supply
16 I2S bit clock output
17 0 V internal power supply
18 16.9 MHz audio clock input
19 5 V internal power supply
20 EBU (IEC 958) input
21 I2S bit clock input
22 I2S word select input
23 I2S digital data input
24 +3 V internal power supply
25 error flag input from I2S source
26 0 V internal power supply
27 active low reset input
28 DRAM pin 3-state control input; also 3-states video outputs and some timing signals
29 active low open drain interrupt request to host microcontroller
30 data not valid input (data on I2S or EBU input not valid)
31 I2C-bus address select pin
32 I2C-bus data pin
33 5 V external pad power supply
34 I2C-bus clock input
35 0 V external pad power supply
36 DRAM data input/output bit 5
5
5 Page 
Philips Semiconductors
Video CD (VCD) decoder
Preliminary specification
SAA2510
‘Trickmode’ implementation
Compared with CD digital audio players, it is likely that
Video CD players will need to offer additional functionality
similar to VCRs. These features are commonly called
‘trickmodes’. Typically, the player will offer features such
as still picture (freeze frame), scan forwards and
backwards as well as slow motion replay.
These features require a combination of CD servo control
and Video CD decoder functions for effective
implementation. The VCD chip provides high level
command features to support these modes in order to
minimize microcontroller time-critical software.
STILL PICTURE DISPLAY
This is implemented directly using a Pause command,
causing the VCD chip to hold the displayed picture at the
next frame update.
SCAN FORWARD AND SCAN BACKWARDS
There is no difference as far as the VCD chip is concerned.
The controlling microcomputer must command the CD
servo to execute a servo jump and re-synchronize. The
VCD chip is then commanded to display the next I
(Intra-coded) picture following re-acquisition of sector
sync.
SLOW-MOTION REPLAY
A command is provided by the VCD chip, allowing a
slow-motion ‘factor’ in the range 2 to 8 to be selected. This
is the factor by which replay will be slowed down. Because
the rate of decoding of video sectors has been reduced,
the video FIFO fills up. The block decoder is designed to
automatically disable acquisition when the video FIFO fills
in this way and an interrupt is generated. At this point, the
next wanted sector (address) has been loaded into a
register in the VCD chip. The controlling microcomputer
then commands a CD servo jump to position on the disc
just before the next desired sector, making allowance for
re-synchronization by the servo and VCD chip.
I2C-bus interface
The VCD chip is programmed via the I2C-bus interface.
The chip is a slave transceiver capable of operating at the
maximum specified bus clock frequency of 400 kHz. It
does not support the general call feature. One of two slave
addresses can be used. The address is selected by the
ASEL input pin.
This bus provides access to the internal registers of the
device. The bus is also used to write OSD slice data and
to read data stored in three play-control sector buffers,
which normally will be used to store Video CD data track
information. This interface features a two or three byte
sub-addressing scheme allowing access to any DRAM
location. However, in normal use, only two byte
sub-addressing is needed.
An interrupt pin is available to signal a number of events
so that the controlling processor does not need to poll VCD
status registers.
Input pin NDAV is used to signal that data on the block
decoder input is not valid, e.g. during CD servo jumps.
A complete memory map and list of registers will be
included in a later version of this data sheet.
I2C-bus slave address selection
A6 A5 A4 A3 A2
00110
A1
1
Note
1. ASEL.
A0 R/W
A0(1)
The data transfer protocol is as follows:
Two and three byte sub-addressing: first the device
sub-address is transmitted, preceded by a START
condition and the slave address:
Two and three byte sub-addressing
S SLA
S = START
W SUB_A
SLA = Slave address
W = Write
SUB_A = Sub-address
The sub-address can be either 2 or 3 bytes. The 3-byte
sub-address is used for DRAM random access. This is not
used for normal operation. It exists only as a test mode.
Since the Video CD IC is internally fully word (16 bits)
oriented, the sub-address must always be an even
address. If an odd-numbered address is given, the Video
CD IC will not acknowledge this byte. For the sub-address,
the least significant byte is sent first. The second
sub-address byte contains 2 control bits.
1996 May 21
11
11 Page | ||
| Páginas | Total 28 Páginas | |
| PDF Descargar | [ Datasheet SAA2510.PDF ] | |
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