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PDF OP249 Data sheet ( Hoja de datos )

Número de pieza OP249
Descripción Dual / Precision JFET High Speed Operational Amplifier
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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a
Dual, Precision
JFET High Speed Operational Amplifier
OP249
FEATURES
Fast Slew Rate:␣ 22 V/s typ
Settling Time (0.01%):␣ 1.2 s max
Offset Voltage:␣ 300 V max
High Open-Loop Gain:␣ 1000 V/mV min
Low Total Harmonic Distortion:␣ 0.002% typ
Improved Replacement for AD712, LT1057, OP215,
TL072 and MC34082
Available in Die Form
APPLICATIONS
Output Amplifier for Fast D/As
Signal Processing
Instrumentation Amplifiers
Fast Sample/Holds
Active Filters
Low Distortion Audio Amplifiers
Input Buffer for A/D Converters
Servo Controllers
GENERAL DESCRIPTION
The OP249 is a high speed, precision dual JFET op amp, simi-
lar to the popular single op amp, the OP42. The OP249 outper-
forms available dual amplifiers by providing superior speed with
excellent dc performance. Ultrahigh open-loop gain (1 kV/mV
minimum), low offset voltage and superb gain linearity, makes
the OP249 the industry’s first true precision, dual high speed
amplifier.
With a slew rate of 22 V/µs typical, and a fast settling time of
less than 1.2 µs maximum to 0.01%, the OP249 is an ideal
PIN CONNECTIONS
8-Lead Cerdip (Z Suffix),
8-Lead Plastic Mini-DIP
(P Suffix)
OUT A 1
–IN A 2
+IN A 3
V– 4
8 V+
A B 7 OUT B
–+ +–
6 –IN B
5 +IN B
TO-99 (J Suffix)
V+
8
OUTA 1
7 OUT B
–IN A 2
–A+ +B–
6 –IN B
+IN A 3
5 +IN B
4
V–
20-Terminal LCC (RC Suffix)
NC 4
–IN A 5
NC 6
+IN A 7
NC 8
3 2 1 20 19
18 NC
17 OUT B
16 NC
15 –IN B
14 NC
9 10 11 12 13
NC = NO CONNECT
8-Lead SO
(S Suffix)
+IN A 1
V– 2
+IN B 3
–IN B 4
–A
+
+
–B
8 –IN A
7 OUT A
6 V+
5 OUT B
choice for high speed bipolar D/A and A/D converter applica-
tions. The excellent dc performance of the OP249 allows the
full accuracy of high resolution CMOS D/As to be realized.
Symmetrical slew rate, even when driving large load, such as
600 or 200 pF of capacitance, and ultralow distortion, make
the OP249 ideal for professional audio applications, active fil-
ters, high speed integrators, servo systems and buffer amplifiers.
The OP249 provides significant performance upgrades to the
TL072, AD712, OP215, MC34082 and the LT1057.
0.010
TA = +25؇C
VS = ؎15V
870ns
VO = 10V p-p
100 RL = 10k
90 AV = +1
100
90
10
0%
10mV
500ns
10
0%
5V
1µs
Figure 1. Fast Settling (0.01%)
0.001
20 100 1k 10k 20k
Figure 2. Low Distortion AV = +1,
RL = 10 k
Figure 3. Excellent Output Drive,
RL = 600
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1998

1 page




OP249 pdf
OUT (A)
–IN (A)
DICE CHARACTERISTICS
V+
OUT (B)
–IN (B)
+IN (A)
+IN (B)
V–
DIE SIZE 0.072 ؋ 0.112 inch, 8,064 sq. mils
(1.83 ؋ 2.84 mm, 5.2 sq. mm)
OP249
WAFER TEST LIMITS (@ VS = ؎15 V, TJ = +25؇C unless otherwise noted)
Parameter
Symbol
Conditions
OP249GBC
Limits
Units
Offset Voltage
Offset Voltage Temperature Coefficient
Input Bias Current
Input Offset Current
Input Voltage Range
Common-Mode Rejection
Power Supply Rejection Ratio
Large-Signal Voltage Gain
Output Voltage Swing
Short-Circuit Current Limit
Supply Current
Slew Rate
VOS
TCVOS
IB
IOS
IVR
CMR
PSRR
AVO
VO
ISC
ISY
SR
–40°C TJ 85°C
VCM = 0 V
VCM = 0 V
(Note 1)
VCM = ± 11 V
VS = ± 4.5 V to ± 18 V
RL = 2 k
RL = 2 k
Output Shorted to Ground
No Load; VO = 0 V
RL = 2 k, CL = 50 pF
0.5
6.0
225
75
± 11
76
100
250
± 12.0
± 20/± 60
7.0
16.5
mV max
µV/°C max
pA max
pA max
V min
dB min
µV/V max
V/mV min
V min
mA min/max
mA max
V/µs min
NOTES
1Guaranteed by CMR test.
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed
for standard product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing.
REV. C
–5–

5 Page





OP249 arduino
The OP249 was carefully designed to provide symmetrically
matched slew characteristics in both the negative and positive
directions, even when driving a large output load.
An amplifier’s slewing limitation determines the maximum
frequency at which a sinusoidal output can be obtained without
significant distortion. It is, however, important to note that the
nonsymmetric stewing typical of previously available JFET
amplifiers adds a higher series of harmonic energy content to
the resulting response—and an additional dc output compo-
nent. Examples of potential problems of nonsymmetric
slewing behavior could be in audio amplifier applications,
where a natural low distortion sound quality is desired, and in
servo or signal processing systems where a net dc offset cannot
be tolerated. The linear and symmetric stewing feature of the
OP249 makes it an ideal choice for applications that will exceed
the full-power bandwidth range of the amplifier.
Figure 42. Small-Signal Transient Response, AV = +1,
ZL = 2 kʈ100 pF, No Compensation, VS = ±15 V
As with most JFET-input amplifiers, the output of the OP249
may undergo phase inversion if either input exceeds the speci-
fied input voltage range. Phase inversion will not damage the
amplifier, nor will it cause an internal latch-up condition.
Supply decoupling should be used to overcome inductance and
resistance associated with supply lines to the amplifier. A 0.1 µF
and a 10 µF capacitor should be placed between each supply
pin and ground.
OPEN-LOOP GAIN LINEARITY
The OP249 has both an extremely high open-loop gain of
1 kV/mV minimum and constant gain linearity. This feature of
the OP249 enhances its dc precision, and provides superb accu-
racy in high closed-loop gain applications. Figure 43 illustrates
the typical open-loop gain linearity—high gain accuracy is as-
sured, even when driving a 600 load.
OFFSET VOLTAGE ADJUSTMENT
The inherent low offset voltage of the OP249 will make offset
adjustments unnecessary in most applications. However, where
a lower offset error is required, balancing can be performed with
simple external circuitry, as illustrated in Figures 44 and 45.
OP249
VERTICAL 50V/DIV
INPUT VARIATION
HORIZONTAL 5V/DIV
OUTPUT CHARGE
Figure 43. Open-Loop Gain Linearity. Variation in Open-
Loop Gain Results in Errors in High Closed-Loop Gain
Circuits. RL = 600 , VS = ±15 V
R4
+V
R5
50k
R3
VIN
R1
200k
R2
31
1/2
OP249
VOUT
VOS ADJUST RANGE = ؎V
R2
R1
–V
Figure 44. Offset Adjust for Inverting Amplifier
Configuration
+V
R3
50k
–V
VIN
R1
200k
R4
R2
33
R5
1/2
OP249
VOUT
VOS ADJUST RANGE = ؎V
R2
R1
GAIN =
VOUT
VIN
=
1
+
R5
R4 + R2
1 + R5 IF R2 << R4
R4
Figure 45. Offset Adjust for Noninverting Amplifier
Configuration
In Figure 44, the offset adjustment is made by supplying a small
voltage at the noninverting input of the amplifier. Resistors R1
and R2 attenuates the pot voltage, providing a ± 2.5 mV (with
VS = ± 15 V) adjustment range, referred to the input. Figure 45
illustrates offset adjust for the noninverting amplifier configura-
tion, also providing a ± 2.5 mV adjustment range. As indicated
in the equations in Figure 45, if R4 is not much greater than R2,
there will be a resulting closed-loop gain error that must be
accounted for.
REV. C
–11–

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