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PDF NDS9957 Data sheet ( Hoja de datos )

Número de pieza NDS9957
Descripción Dual N-Channel Enhancement Mode Field Effect Transistor
Fabricantes Fairchild 
Logotipo Fairchild Logotipo



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February 1996
NDS9957
Dual N-Channel Enhancement Mode Field Effect Transistor
General Description
Features
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high cell
density, DMOS technology. This very high density process is
especially tailored to minimize on-state resistance, provide
superior switching performance, and withstand high energy
pulses in the avalanche and commutation modes. These
devices are particularly suited for low voltage applications such
as DC motor control and DC/DC conversion where fast
switching, low in-line power loss, and resistance to transients
are needed.
2.6A, 60V. RDS(ON) = 0.16@ VGS = 10V.
High density cell design for extremely low RDS(ON).
High power and current handling capability in a widely used
surface mount package.
Dual MOSFET in surface mount package.
_______________________________________________________________________________
54
63
72
81
Absolute Maximum Ratings
Symbol Parameter
TA = 25°C unless otherwise noted
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage
ID Drain Current - Continuous
- Pulsed
(Note 1a)
PD Power Dissipation for Dual Operation
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
TJ,TSTG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
(Note 1c)
RθJA
RθJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
© 1997 Fairchild Semiconductor Corporation
NDS9957
60
± 20
± 2.6
± 10
2
1.6
1
0.9
-55 to 150
78
40
Units
V
V
A
W
°C
°C/W
°C/W
NDS9957.SAM

1 page




NDS9957 pdf
Typical Electrical Characteristics (continued)
1.12
I D = 250µA
1.08
1.04
1
0.96
0.92
-50 -25 0 25 50 75 100 125 150
TJ , JUNCTION TEMPERATURE (°C)
Figure 7. Breakdown Voltage Variation with
Temperature.
10
V GS = 0V
1
TJ = 125°C
0.1
25°C
-55°C
0.01
0.001
0.2
0.4 0.6 0.8 1 1.2
VSD , BODY DIODE FORWARD VOLTAGE (V)
1.4
Figure 8. Body Diode Forward Voltage Variation
with Current and Temperature.
500
300 C iss
200
100
C oss
50
20
10
0.1
f = 1 MHz
VGS = 0V
C rss
0.2
0.5 1
2
5 10 20 30 60
V DS , DRAIN TO SOURCE VOLTAGE (V)
Figure 9. Capacitance Characteristics.
10
ID = 2.6A
8
6
VDS = 5V
30V
10V
4
2
0
0246
Q g , GATE CHARGE (nC)
Figure 10. Gate Charge Characteristics.
8
VIN
VG S
RGEN
G
VDD
RL
D
VOUT
DUT
S
Figure 11. Switching Test Circuit
t d(on)
ton
tr
90%
td(off)
toff
tf
90%
VO U T
VIN
10%
10%
50%
10%
90%
INVERTED
50%
PULSE WIDTH
Figure 12. Switching Waveforms
NDS9957.SAM

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