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PDF NDP6030 Data sheet ( Hoja de datos )
| Número de pieza | NDP6030 | |
| Descripción | N-Channel Logic Level Enhancement Mode Field Effect Transistor | |
| Fabricantes | Fairchild | |
| Logotipo |  |
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July 1997
NDP6030 / NDB6030
N-Channel Enhancement Mode Field Effect Transistor
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high cell
density, DMOS technology. This very high density process has
been especially tailored to minimize on-state resistance and
provide superior switching performance. These devices are
particularly suited for low voltage applications such as DC/DC
converters and other battery powered circuits where fast
switching, low in-line power loss, and resistance to transients
are needed.
Features
46 A, 30 V. RDS(ON) = 0.018 @ VGS=10 V.
Critical DC electrical parameters specified at elevated
temperature.
Rugged internal source-drain diode can eliminate the need
for an external Zener diode transient suppressor.
175°C maximum junction temperature rating.
High density cell design for extremely low RDS(ON).
TO-220 and TO-263 (D2PAK) package for both through hole
and surface mount applications
________________________________________________________________________________
D
G
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol Parameter
NDP6030
VDSS Drain-Source Voltage
VDGR
Drain-Gate Voltage (RGS < 1 MΩ)
VGSS Gate-Source Voltage - Continuous
ID Drain Current - Continuous
- Pulsed
PD Total Power Dissipation @ TC = 25°C
Derate above 25°C
TJ,TSTG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
RθJC
Rθ JA
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient
© 1997 Fairchild Semiconductor Corporation
30
30
±20
46
135
75
0.5
-65 to 175
NDB6030
2
62.5
S
Units
V
V
V
A
W
W/°C
°C
°C/W
°C/W
NDP6030.RevB
1 page | ||
| Páginas | Total 4 Páginas | |
| PDF Descargar | [ Datasheet NDP6030.PDF ] | |
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