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PDF NDP5060 Data sheet ( Hoja de datos )

Número de pieza NDP5060
Descripción N-Channel Enhancement Mode Field Effect Transistor
Fabricantes Fairchild 
Logotipo Fairchild Logotipo



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No Preview Available ! NDP5060 Hoja de datos, Descripción, Manual

October 1996
NDP5060 / NDB5060
N-Channel Enhancement Mode Field Effect Transistor
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high cell
density, DMOS technology. This very high density process has
been especially tailored to minimize on-state resistance,
provide superior switching performance, and withstand high
energy pulses in the avalanche and commutation modes.
These devices are particularly suited for low voltage
applications such as automotive, DC/DC converters, PWM
motor controls, and other battery powered circuits where fast
switching, low in-line power loss, and resistance to transients
are needed.
Features
26 A, 60 V. RDS(ON) = 0.05 @ VGS= 10 V.
Critical DC electrical parameters specified at elevated
temperature.
Rugged internal source-drain diode can eliminate the need
for an external Zener diode transient suppressor.
175°C maximum junction temperature rating.
High density cell design for extremely low RDS(ON).
TO-220 and TO-263 (D2PAK) package for both through hole
and surface mount applications.
________________________________________________________________________________
D
G
Absolute Maximum Ratings
Symbol Parameter
TC = 25°C unless otherwise note
NDP5060
VDSS Drain-Source Voltage
VDGR
Drain-Gate Voltage (RGS < 1 M)
VGSS Gate-Source Voltage - Continuous
- Nonrepetitive (tP < 50 µs)
ID Drain Current - Continuous
- Pulsed
PD Total Power Dissipation @ TC = 25°C
Derate above 25°C
TJ,TSTG Operating and Storage Temperature Range
S
60
60
±20
±40
26
78
68
0.45
-65 to 175
NDB5060
Units
V
V
V
A
W
W/°C
°C
© 1997 Fairchild Semiconductor Corporation
NDP5060 Rev.A

1 page




NDP5060 pdf
Typical Electrical Characteristics (continued)
1.2
I D = 250µA
1.15
1.1
1.05
1
0.95
0.9
-50
-25
0 25 50 75 100 125 150 175
T J , JUNCTION TEMPERATURE (°C)
Figure 7. Breakdown Voltage Variation with
Temperature.
20
10 V GS = 0V
3
1
0.1
0.01
TJ = 125°C
25°C
-55°C
0.001
0.0001
0
0.3 0.6 0.9 1.2
VSD , BODY DIODE FORWARD VOLTAGE (V)
1.5
Figure 8. Body Diode Forward Voltage
Variation with Current and Temperature.
1500
1000
500
200
Ciss
Coss
100
40
1
f = 1 MHz
VGS = 0V
Crss
23
5
10 20
VDS , DRAIN TO SOURCE VOLTAGE (V)
40 60
Figure 9. Capacitance Characteristics.
20
I D = 26A
16
12
8
4
0
08
VDS = 12V
24V
48V
16 24
Q g , GATE CHARGE (nC)
32
Figure 10. Gate Charge Characteristics.
40
VIN
VG S
RGEN
G
VDD
RL
D
VOUT
DUT
S
Figure 11. Switching Test Circuit.
t d(on)
ton
tr
90%
td(off)
toff
tf
90%
VO U T
VIN
10%
10%
50%
10%
90%
INVERTED
50%
PULSE WIDTH
Figure 12. Switching Waveforms.
NDP5060 Rev.A

5 Page





NDP5060 arduino
TO-263AB/D2PAK Tape and Reel Data and Package Dimensions, continued
TO-263AB/D2PAK (FS PKG Code 45)
1:1
Scale 1:1 on letter size paper
Dimensions shown below are in:
inches [millimeters]
Part Weight per unit (gram): 1.4378
August 1998, Rev. A

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