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PDF NDH8304 Data sheet ( Hoja de datos )

Número de pieza NDH8304
Descripción Dual P-Channel Enhancement Mode Field Effect Transistor
Fabricantes Fairchild 
Logotipo Fairchild Logotipo



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NDH8304P
Dual P-Channel Enhancement Mode Field Effect Transistor
May 1997
General Description
SuperSOTTM-8 P-Channel enhancement mode power field
effect transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high density
process is especially tailored to minimize on-state resistance.
These devices are particularly suited for low voltage
applications such as notebook computer power management
and other battery powered circuits where fast high-side
switching, and low in-line power loss are needed in a very small
outline surface mount package.
Features
-2.7 A, -20 V. RDS(ON) = 0.07 @ VGS = -4.5 V
RDS(ON) = 0.095 @ VGS = -2.7 V.
Proprietary SuperSOTTM-8 package design using copper
lead frame for superior thermal and electrical capabilities.
High density cell design for extremely low RDS(ON).
Exceptional on-resistance and maximum DC current
capability.
___________________________________________________________________________________________
54
63
72
81
Absolute Maximum Ratings TA = 25°C unless otherwise noted
Symbol Parameter
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage
ID Drain Current - Continuous
- Pulsed
(Note 1)
PD Maximum Power Dissipation
(Note 1)
TJ,TSTG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
RθJA
RθJC
Thermal Resistance, Junction-to-Ambient (Note 1)
Thermal Resistance, Junction-to-Case (Note 1)
© 1997 Fairchild Semiconductor Corporation
NDH8304P
-20
±8
-2.7
-10
0.8
-55 to 150
156
40
Units
V
V
A
W
°C
°C/W
°C/W
NDH8304P Rev.C

1 page




NDH8304 pdf
Typical Electrical Characteristics
1.1
ID = -250µA
1.08
1.06
1.04
1.02
1
0.98
0.96
0.94
-50
-25
0 25 50 75 100 125 150
TJ , JUNCTION TEMPERATURE (°C)
Figure 7. Breakdown Voltage Variation with
Temperature.
10
3 VGS = 0V
1
0.5
0.1
0.01
TJ = 125°C
25°C
-55°C
0.001
0.0001
0
0.2 0.4 0.6 0.8
1
-VSD , BODY DIODE FORWARD VOLTAGE (V)
1.2
Figure 8. Body Diode Forward Voltage
Variation with Current and Temperature.
2500
1500
1000
Ciss
5 0 0 Coss
300
200 f = 1 MHz
VGS = 0 V
Crss
100
0 .1
0 .2
0 .5 1
2
5 10
-VDS , DRAIN TO SOURCE VOLTAGE (V)
20
Figure 9. Capacitance Characteristics.
5
I = -2.7A
D
4
3
VDS = -5V
-10V
-15V
2
1
0
0 5 10 15 20
Q g , GATE CHARGE (nC)
Figure 10. Gate Charge Characteristics.
VIN
VG S
RGEN
G
-VD D
RL
D
VOUT
DUT
S
Figure 11. Switching Test Circuit.
t d(on)
ton
tr
90%
td(off)
toff
tf
90%
VO U T
VIN
10%
10%
50%
10%
90%
50%
PULSE WIDTH
INVERTED
Figure 12. Switching Waveforms.
NDH8304P Rev.C

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