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Numéro de référence | NDC7002N | ||
Description | Dual N-Channel Enhancement Mode Field Effect Transistor | ||
Fabricant | Fairchild | ||
Logo | |||
1 Page
March 1996
NDC7002N
Dual N-Channel Enhancement Mode Field Effect Transistor
General Description
These dual N-Channel enhancement mode power field
effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This
very high density process has been designed to minimize
on-state resistance, provide rugged and reliable
performance and fast switching. These devices is
particularly suited for low voltage applications requiring a
low current high side switch.
Features
0.51A, 50V, RDS(ON) = 2Ω @ VGS=10V
High density cell design for low RDS(ON).
Proprietary SuperSOTTM-6 package design using copper
lead frame for superior thermal and electrical capabilities.
High saturation current.
____________________________________________________________________________________________
SOT-6 (SuperSOTTM-6)
Absolute Maximum RatingsTA = 25°C unless otherwise noted
Symbol Parameter
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage - Continuous
ID Drain Current - Continuous
- Pulsed
(Note 1a)
PD Maximum Power Dissipation
(Note 1a)
(Note 1b)
(Note 1c)
TJ,TSTG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
RθJA
RθJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
43
52
61
NDC7002N
50
20
0.51
1.5
0.96
0.9
0.7
-55 to 150
130
60
Units
V
V
A
W
°C
°C/W
°C/W
© 1997 Fairchild Semiconductor Corporation
NDC7002N.SAM
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Pages | Pages 10 | ||
Télécharger | [ NDC7002N ] |
No | Description détaillée | Fabricant |
NDC7002 | Dual N-Channel Enhancement Mode Field Effect Transistor | Fairchild |
NDC7002N | Dual N-Channel Enhancement Mode Field Effect Transistor | Fairchild |
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