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PDF NC7WZ07P6X Data sheet ( Hoja de datos )
| Número de pieza | NC7WZ07P6X | |
| Descripción | TinyLogic UHS Dual Buffer (Open Drain Outputs) | |
| Fabricantes | Fairchild | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de NC7WZ07P6X (archivo pdf) en la parte inferior de esta página. Total 7 Páginas | ||
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March 1999
Revised May 2003
NC7WZ07
TinyLogic UHS Dual Buffer (Open Drain Outputs)
General Description
The NC7WZ07 is a dual buffer with open drain outputs
from Fairchild’s Ultra High Speed Series of TinyLogic in
the space saving SC70 6-lead package. The device is fab-
ricated with advanced CMOS technology to achieve ultra
high speed with high output drive while maintaining low
static power dissipation over a very broad VCC operating
range. The device is specified to operate over the 1.65V to
5.5V VCC range. The inputs and outputs are high imped-
ance when VCC is 0V. Inputs tolerate voltages up to 7V
independent of VCC operating voltage.
Features
s Space saving SC70 6-lead package
s Ultra small MicroPak leadless package
s Ultra High Speed: tPZL 2.3 ns Typ into 50 pF at 5V VCC
s High IOL Output Drive: +24 mA at 3V VCC
s Broad VCC Operating Range: 1.65V to 5.5V
s Matches the performance of LCX when operated at
3.3V VCC
s Power down high impedance inputs/outputs
s Overvoltage tolerant inputs facilitate 5V to 3V translation
s Patented noise/EMI reduction circuitry implemented
Ordering Code:
Order
Number
NC7WZ07P6X
NC7WZ07L6X
Package
Number
MAA06A
MAC06A
Product Code
Top Mark
Package Description
Z07 6-Lead SC70, EIAJ SC88, 1.25mm Wide
D3 6-Lead MicroPak, 1.0mm Wide
Supplied As
3k Units on Tape and Reel
5k Units on Tape and Reel
Logic Symbol
Connection Diagrams
IEEE/IEC
Pin Assignments for SC70
Pin Descriptions
Pin Names
A1, A2
Y1, Y2
Description
Data Inputs
Output
(Top View)
Pin One Orientation Diagram
Function Table
Y=A
Input
A
L
H
Output
Y
L
Z
AAA represents Product Code Top Mark - see ordering code
Note: Orientation of Top Mark determines Pin One location. Read the top
product code mark left to right, Pin One is the lower left pin (see diagram).
Pad Assignments for MicroPak
H = HIGH Logic Level
L = LOW Logic Level
TinyLogic is a registered trademark of Fairchild Semiconductor Corporation.
MicroPak is a trademark of Fairchild Semiconductor Corporation.
(Top Thru View)
© 2003 Fairchild Semiconductor Corporation DS500218
www.fairchildsemi.com
1 page  
Tape and Reel Specification (Continued)
TAPE FORMAT for MicroPak
Package
Tape
Designator
Section
Leader (Start End)
L6X Carrier
Trailer (Hub End)
Number
Cavities
125 (typ)
5000
75 (typ)
Cavity
Status
Empty
Filled
Empty
Cover Tape
Status
Sealed
Sealed
Sealed
REEL DIMENSIONS inches (millimeters)
Tape
Size
8 mm
ABCDN
W1
7.0 0.059 0.512 0.795 2.165 0.331 + 0.059/−0.000
(177.8) (1.50) (13.00) (20.20) (55.00) (8.40 + 1.50/−0.00)
W2
0.567
(14.40)
W3
W1 + 0.078/−0.039
(W1 + 2.00/−1.00)
5 www.fairchildsemi.com
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet NC7WZ07P6X.PDF ] | |
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