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Número de pieza NC7WP240K8X
Descripción TinyLogic ULP Dual Inverting Buffer with 3-STATE Outputs
Fabricantes Fairchild 
Logotipo Fairchild Logotipo



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June 2003
Revised January 2005
NC7WP240
TinyLogicULP Dual Inverting Buffer
with 3-STATE Outputs
General Description
The NC7WP240 is a Dual Inverting Buffer with indepen-
dent active LOW enables for the 3-STATE outputs. The
Ultra High Power device is ideal for applications where bat-
tery life is critical. This product is designed for ultra low
power consumption within the VCC operating range of 0.9V
to 3.6V VCC.
The internal circuit is composed of a minimum of inverter
stages, including the output buffer, to enable ultra low static
and dynamic power.
The NC7WP240 for lower drive requirements, is uniquely
designed for optimized power and speed, and is fabricated
with an advanced CMOS technology to achieve best in
class speed operation while maintaining extremely low
CMOS power dissipation.
Features
s Space saving US8 surface mount package
s MicroPakPb-Free leadless package
s 0.9V to 3.6V VCC supply operation
s 3.6V overvoltage tolerant I/O’s at VCC from 0.9V to 3.6V
s tPD
3.0 ns typ for 3.6V VCC
4.0 ns typ for 2.3V to 2.7V VCC
5.0 ns typ for 1.65V to 1.95V VCC
6.0 ns typ for 1.40V to 1.60V VCC
10.0 ns typ for 1.10V to 1.30V VCC
26.0 ns typ for 0.90V VCC
s Power-Off high impedance inputs and outputs
s Static Drive (IOH/IOL)
±2.6 mA @ 3.00V VCC
±2.1 mA @ 2.30V VCC
±1.5 mA @ 1.65V VCC
±1.0 mA @ 1.40V VCC
±0.5 mA @ 1.10V VCC
±20 µA @ 0.9V VCC
s Uses patented Quiet Seriesnoise/EMI reduction
circuitry
s Ultra low dynamic power
Ordering Code:
Product
Order
Package Code
Package Description
Supplied As
Number
Number Top Mark
NC7WP240K8X MAB08A WP40 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide 3k Units on Tape and Reel
NC7WP240L8X MAC08A Z3 Pb-Free 8-Lead MicroPak, 1.6 mm Wide
5k Units on Tape and Reel
Pb-Free package per JEDEC J-STD-020B.
Battery Life vs. VCC Supply Voltage
TinyLogic ULP and ULP-A with up to 50% less power consumption can
extend your battery life significantly.
Battery Life = (Vbattery *Ibattery*.9)/(Pdevice)/24hrs/day
Where, Pdevice = (ICC * VCC) + (CPD + CL) * VCC2 * f
Assumes ideal 3.6V Lithium Ion battery with current rating of 900mAH and
derated 90% and device frequency at 10MHz, with CL = 15 pF load
TinyLogicis a registered trademark of Fairchild Semiconductor Corporation.
MicroPakand Quiet Seriesare trademarks of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation DS500818
www.fairchildsemi.com

1 page




NC7WP240K8X pdf
AC Electrical Characteristics (Continued)
Symbol
Parameter
tPHZ,
tPLZ
Output
Disable Time
tPHL,
tPLH
Propagation Delay
tPZH,
tPZL
Output
Enable Time
tPHZ,
tPLZ
Output
Disable Time
CIN
COUT
CPD
Input Capacitance
Output Capacitance
Power Dissipation
Capacitance
VCC
(V)
0.90
1.10 VCC 1.30
1.40 VCC 1.60
1.65 VCC 1.95
2.30 VCC 2.70
3.00 VCC 3.60
0.90
1.10 VCC 1.30
1.40 VCC 1.60
1.65 VCC 1.95
2.30 VCC 2.70
3.00 VCC 3.60
0.90
1.10 VCC 1.30
1.40 VCC 1.60
1.65 VCC 1.95
2.30 VCC 2.70
3.00 VCC 3.60
0.90
1.10 VCC 1.30
1.40 VCC 1.60
1.65 VCC 1.95
2.30 VCC 2.70
3.00 VCC 3.60
0
0
TA = +25°C
Min Typ Max
30.0
5.0 11.0 21.6
3.0 7.0 15.9
2.0 5.0 15.2
1.5 4.0 14.1
1.0 3.0 13.9
34.0
5.5
12.0
23.4
4.0 8.0 13.8
2.0 6.0 10.6
1.0 5.0 7.6
0.8 4.0 6.4
37.0
6.0
13.0
24.4
4.0 8.0 14.5
2.0 6.0 11.7
1.0 5.0 9.1
0.8 4.0 8.1
36.0
6.0
13.0
24.8
4.0 8.0 17.1
2.0 6.0 16.5
1.0 5.0 15.2
0.8 4.0 14.8
2.0
4.0
0.9 to 3.60
10.0
TA = −40°C to +85°C Units
Min Max
Conditions
Figure
Number
CL = 15 pF
4.5 44.9
RU = 5000
2.5
2.0
18.8
18.2
ns
RD = 5000
Figures
S1 = GND for tPHZ 1, 2
1.0 15.4
S1 = VI for tPLZ
0.5 15.1
5.0 51.1
3.0
17.7
ns CL = 30 pF
2.0 14.0
RL = 1 M
1.0 9.9
Figures
1, 2
0.5 8.9
CL = 30 pF
5.0 51.9
RU = 5000
3.0
2.0
17.9
14.7
ns
RD = 5000
Figures
S1 = GND for tPZH 1, 2
1.0 11.1
S1 = VI for tPZL
0.5 10.1
CL = 30 pF
5.0 53.5
RU = 5000
3.0
2.0
21.1
20.5
ns
RD = 5000
Figures
S1 = GND for tPHZ 1, 2
1.0 16.7
S1 = VI for tPLZ
0.5 16.3
pF
pF
pF VI = VO or VCC,
f = 10 MHZ
5 www.fairchildsemi.com

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