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NTE Electronics - Integrated Circuit NMOS / 8-Bit Microprocessor (MPU)

Numéro de référence NTE6809
Description Integrated Circuit NMOS / 8-Bit Microprocessor (MPU)
Fabricant NTE Electronics 
Logo NTE Electronics 





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NTE6809 fiche technique
NTE6809 & NTE6809E
Integrated Circuit
NMOS, 8–Bit Microprocessor (MPU)
Description:
The NTE6809 and NTE6809E are revolutionary high performance 8–bit microprocessors in 40–Lead
DIP type packages which support modern programming techniques such as position independece,
reentrancy, and modular programming.
The basic instructions of any computer are greatly enhanced by the presence of powerful addressing
modes. The NTE6809 and NTE6809E have the most complete set of addressing modes available
on any 8–bit microprocessor today.
These devices contain hardware and software features which make them ideal processors for higher
level language execution or standard controller applications. External clock inputs are provided on
the NTE6809E to allow synchronization with peripherals, systems, or other MPUs.
Architectural Features:
D Two 16–Bit Index Registers
D Two 16–Bit Indexable Stack Pointers
D Two 8–Bit Accumulators can be Concatenated to Form One 16–Bit Accumulator
D Direct Page Register Allows Direct Addressing Throughout Memory
Hardware Features:
D On–Chip Oscillator (Crystal Frequency = 4 x E), NTE6809 Only
D DMA/BREQ Allows DMA Operation on Memory Refresh, NTE6809 Only
D External Clock Inputs, E and Q, Allow Synchronization, NTE6809E Only
D TSC Input Controls Internal Bus Buffers, NTE6809E Only
D LIC Indicates Opcode Fetch, NTE6809E Only
D AVMA Allows Efficient Use of Common Resource in a Multiprocessor System, NTE6809E Only
D BUSY is a Status Line for Multiprocessing, NTE6809E Only
D Fast Interrupt Request Input Stacks Only Condition Code Register and Program Counter
D MRDY Input Extends Data Across Times for Use with Slow Memory
D Interrupt Acknowledge Output Allows Vectoring by Devices
D Sync Acknowledge Output Allows for Synchronization to External Event
D Single Bus–Cycle RESET
D Single 5V Supply Operation
D NMI Inhibited After RESET Until After First Load Stack Pointer
D Early Address Valid Allows Use with Slower Memories
D Early Write Data for Dynamic Memories

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