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NTD20N03L27T4 fiches techniques PDF

ON - Power MOSFET ( Transistor )

Numéro de référence NTD20N03L27T4
Description Power MOSFET ( Transistor )
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NTD20N03L27T4 fiche technique
NTD20N03L27
Power MOSFET
20 Amps, 30 Volts, N−Channel DPAK
This logic level vertical power MOSFET is a general purpose part
that provides the “best of design” available today in a low cost power
package. Avalanche energy issues make this part an ideal design in.
The drain−to−source diode has a ideal fast but soft recovery.
Features
Pb−Free Packages are Available
Ultra−Low RDS(on), Single Base, Advanced Technology
SPICE Parameters Available
Diode is Characterized for use in Bridge Circuits
IDSS and VDS(on) Specified at Elevated Temperatures
High Avalanche Energy Specified
ESD JEDAC rated HBM Class 1, MM Class A, CDM Class 0
Typical Applications
Power Supplies
Inductive Loads
PWM Motor Controls
Replaces MTD20N03L in many Applications
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol Value Unit
Drain−to−Source Voltage
Drain−to−Gate Voltage (RGS = 1.0 MW)
Gate−to−Source Voltage
− Continuous
− Non−Repetitive (tpv10 ms)
Drain Current
− Continuous @ TA = 25_C
− Continuous @ TA = 100_C
− Single Pulse (tpv10 ms)
Total Power Dissipation @ TA = 25_C
Derate above 25°C
Total Power Dissipation @ TC = 25°C (Note 1)
VDSS
VDGR
VGS
VGS
ID
ID
IDM
PD
30
30
"20
"24
Vdc
Vdc
Vdc
20 Adc
16
60 Apk
74 W
0.6 W/°C
1.75 W
Operating and Storage Temperature Range
TJ, Tstg
−55 to
150
°C
Single Pulse Drain−to−Source Avalanche
Energy − Starting TJ = 25°C
(VDD = 30 Vdc, VGS = 5 Vdc, L = 1.0 mH,
IL(pk) = 24 A, VDS = 34 Vdc)
Thermal Resistance
− Junction−to−Case
− Junction−to−Ambient
− Junction−to−Ambient (Note 1)
Maximum Lead Temperature for Soldering
Purposes, 1/8from case for 10 seconds
EAS 288 mJ
RqJC
RqJA
RqJA
TL
°C/W
1.67
100
71.4
260 °C
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits
are exceeded, device functional operation is not implied, damage may occur
and reliability may be affected.
1. When surface mounted to an FR4 board using the minimum recommended
pad size and repetitive rating; pulse width limited by maximum junction
temperature.
© Semiconductor Components Industries, LLC, 2004
August, 2004 − Rev. 2
1
http://onsemi.com
20 A, 30 V, RDS(on) = 27 mW
N−Channel
D
G
4
12
3
S
MARKING
DIAGRAMS
4
Drain
DPAK
CASE 369C
STYLE 2
1
Gate
2
Drain
3
Source
4
1
2
3
DPAK−3
CASE 369D
STYLE 2
4
Drain
12 3
Gate Drain Source
20N3L
A
Y
WW
= Device Code
= Assembly Location
= Year
= Work Week
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
Publication Order Number:
NTD20N03L27/D

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