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PDF NT6881 Data sheet ( Hoja de datos )

Número de pieza NT6881
Descripción USB Keyboard Micro-Controller
Fabricantes ETC 
Logotipo ETC Logotipo



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No Preview Available ! NT6881 Hoja de datos, Descripción, Manual

NT6881
Features
n Built-in 6502 8-bit CPU
n 3 MHz CPU operation frequency when oscillator is
running at 6 MHz
n 6K bytes of ROM
n 256 bytes of SRAM
n One 8-bit programmable base timer with pre-divider
circuit
n 29 programmable bi-directional I/O pins including two
external interrupts
USB Keyboard Micro-Controller
n 3 LED direct sink pins with internal serial resistors
n On-chip oscillator (Crystal or Ceramic Resonator)
n Watch-dog timer reset
n Built-in power on reset
n USB interface
n 3 Endpoints provided
n Remote Wakeup provided
n CMOS technology for low power consumption
n 40-pin DIP package, 42-pad Chip Form and COB
General Description
The NT6881 is a single chip micro-controller for USB
keyboard applications. It incorporates a 6502 8-bit CPU
core, 6K bytes of mask ROM, and 256 bytes of RAM used
as working RAM and stack area. It also includes 29
programmable bi-directional I/O pins with built-in
resistors, and one 8-bit pre-loadable base timer.
Pin Configuration
GND
VCP
VDP
VDM
P30
P31
INT0/P32
INT1/P33
P34
RESET
P00
P01
P02
P03
P04
P05
P06
P07
P10
P11
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40 OSCI
39 OSCO
38 VDD
37 LED2
36 LED1
35 LED0
34 P27
33 P26
32 P25
31 P24
30 P23
29 P22
28 P21
27 P20
26 P17
25 P16
24 P15
23 P14
22 P13
21 P12
Additionally, it includes a built-in power-on reset, a built-
in low voltage reset, an oscillator that requires crystal or
ceramic resonator applied, and a watch-dog timer that
prevents system standstill.
Pad Configuration
V
D
P
4
VDM
5
P30
P31
P32
P33
P34
RESET
P00
P01
P02
P03
6
7
8
9
10
11
12
13
14
15
16
V GG
C NN
P DD
OO
SS
CC
IO
VV
CC
CC
42 41
3 21
40 39
NT6881H
38
37
36
35
34
33
32
31
30
29
28
27
17 18
19 20 21 22 23 24 25 26
LED2
LED1
LED0
P27
P26
P25
P24
P23
P22
P21
P20
P17
P
PP
P P P PP P P P
0
00
0 1 1 11 1 11
4
56
7 0 1 23 4 56
1 V2.6

1 page




NT6881 pdf
2.Instruction Set List
Instruction Code
Meaning
ADC
Add with carry
AND
Logical AND
ASL
Shift left one bit
BCC
Branch if carry clear
BCS
Branch if carry set
BEQ
Branch if equal to zero
BIT Bit test
BMI Branch if minus
BNE
Branch if not equal to zero
BPL
Branch if plus
BRK
Break
BVC
Branch if overflow clear
BVS
Branch if overflow set
CLC
Clear carry
CLD
Clear decimal mode
CLI Clear interrupt disable bit
CLV Clear overflow
CMP
Compare accumulator to memory
CPX
Compare with index register X
CPY
Compare with index register Y
DEC
Decrement memory by one
DEX
Decrement index X by one
DEY
Decrement index Y by one
EOR
Logical exclusive-OR
INC Increment memory by one
INX Increment index X by one
INY Increment index Y by one
JMP
Jump to new location
JSR Jump to subroutine
NT6881
A+M+C
Operation
AC
AM A
C M7
M0 0
Branch on C 0
Branch on C 1
Branch on Z 1
A M M7 N M6 V
Branch on N 1
Branch on Z 0
Branch on N 0
Forced interrupt PC + 2 PC
Branch on V 0
Branch on V 1
0C
0D
0I
0V
AM
XM
YM
M1M
X1 X
Y1Y
A MA
M+1 M
X+1 X
Y+1 Y
(PC + 1) PCL (PC + 2) PCH
PC + 2 (PC + 1) PCL (PC + 2)
PCH
5

5 Page





NT6881 arduino
NT6881
9.7. IN1 Token Interrupt
When an IN TOKEN for endpoint 1 is done, it will set the IN1 flag. If this interrupt is enabled by writing "1" to EIN1 ($0005H,
bit2), it will interrupt 6502 CPU. When an interrupt occurs, the CPU jumps to $FFFEH & $FFFFH to execute the interrupt
service routine, the IN1 flag must be cleared by software.
9.8. IN2 Token Interrupt
When an IN TOKEN for endpoint 2 is done, it will set the IN2 flag. If this interrupt is enabled by writing "1" to EIN2 ($0005H,
bit3), it will interrupt 6502 CPU. When an interrupt occurs, the CPU jumps to $FFFEH & $FFFFH to execute the interrupt
service routine, the IN2 flag must be cleared by the software.
9.9. STUP (SETUP) Token Interrupt
When a SETUP TOKEN for endpoint 0 is done, it will set the STUP flag. If this interrupt is enabled by writing "1" to ESTUP
($0005H, bit6), it will interrupt 6502 CPU. When an interrupt occurs, the CPU jumps to $FFFEH & $FFFFH to execute the
interrupt service routine, the STUP flag must be cleared by the software.
9.10. SUSP Interrupt
When USB SIE detects a suspend signal, it sets the SUSP flag. Then 6502 CPU is interrupted if the interrupt has been
enabled already by writing “1” to ESUSP ($0005H, bit7). If ESUSP flag is cleared, 6502 CPU can’t be SUSP interrupted
even if SUSP flag is set. SUSP flag can be set by H/W only and can’t be set/cleared directly by S/W except for writing “1” to
CSUSP ($0004H, bit 7) flag to clear SUSP flag. When an interrupt occurs, the CPU jumps to $FFFEH & $FFFFH to execute
the interrupt service routine, the SUSP flag must be cleared by software.
10. I/O PORTs
The NT6881 has 32 pins dedicated to input and output. These pins are grouped into 5 ports, as follows:
PORT0 (P00~P07)
PORT0 is an 8-bit bi-directional CMOS I/O port that is internally pulled high by PMOS. Each pin of PORT0 can be bit
programmed as an input or output port under software control. When programmed as output, data is latch to the port data
register and output to the pin. PORT0 pins with “1” written to them are pulled high by the internal PMOS pull-ups, and can
be used as inputs in that state then these input signals can be read. The port will output high after reset.
PORT1 (P10~P17): Functions the same as PORT0.
PORT2 (P20~P27): Functions the same as PORT0.
PORT3 (P30~P34): Functions the same as PORT0. Except for P33/P32 is shared with INT1/INT0 pin. It is also a Schmitt
Trigger input with an interrupt source of falling edge sensitive.
LED: There are three LED direct sink pins which require no external serial resistors.
The address is mapped to $000DH.
11

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