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PDF NMC27C32B Data sheet ( Hoja de datos )

Número de pieza NMC27C32B
Descripción CMOS EPROM
Fabricantes Fairchild 
Logotipo Fairchild Logotipo



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NMC27C32B
32,768-Bit (4096 x 8) CMOS EPROM
January 1999
General Description
The NMC27C32B is a 32k UV erasable and electrically
reprogrammable CMOS EPROM, ideally suited for applications
where fast turnaround, pattern experimentation and low power
consumption are important requirements.
The NMC27C32B is designed to operate with a single +5V power
supply with ±10% tolerance.
The NMC27C32B is packaged in a 24-pin dual-in-line package
with a quartz window. The quartz window allows the user to
expose the chip to ultraviolet light to erase the bit pattern. A new
pattern can then be written electrically into the device by following
the programming procedure.
This EPROM is fabricated with Fairchild’s proprietary, time proven
CMOS double-poly silicon gate technology which combines high
performance and high density with low power consumption and
excellent reliability.
Features
s Low CMOS power consumption
— Active Power: 55 mW Max
— Standby Power: 0.55 mW Max
s Industrial temperature range, -40°C to +85°C
s Fast and reliable programming
s TTL, CMOS compatible inputs/outputs
s TRI-STATE ® output
s Manufacturer’s identification code for automatic program-
ming
s High current CMOS level output drivers
s Compatible with NMOS 2732
Block Diagram
VCC
GND
VPP
Data Outputs O0 - O7
OE Output Enable,
Chip Enable, and
CE Program Logic
Output
Buffers
A0 - A11
Address
Inputs
Y Decoder
X Decoder
32,768-Bit
Cell Matrix
© 1998 Fairchild Semiconductor Corporation
NMC27C32B Rev. C
1
DS008827-1
www.fairchildsemi.com

1 page




NMC27C32B pdf
Programming Characteristics (Note 11) (Note 12) (Note 13) (Note 14)
Symbol
tAS
tOES
tDS
tVCS
tAH
tDH
tCF
tPW
tOEH
tDV
tPRT
tVR
IPP
ICC
TA
VCC
VPP
tFR
VIL
VIH
tIN
tOUT
Parameter
Conditions
Address Setup Time
OE Setup Time
Data Setup Time
VCC Setup Time
Address Hold Time
Data Hold Time
Chip Enable to Output Float Delay OE = VIL
Program Pulse Width
OE Hold Time
Data Valid from CE
OE Pulse Rise Time
During Programming
OE = VIL
VPP Recovery Time
VPP Supply Current During
Programming Pulse
VCC Supply Current
Temperature Ambient
CE = VIL,
OE = VPP
Power Supply Voltage
Programming Supply Voltage
Input Rise, Fall Time
Input Low Voltage
Input High Voltage
Input Timing Reference Voltage
Output Timing Reference Voltage
Min
1
1
1
1
0
1
0
95
1
50
1
Typ
100
20 25
6.0 6.25
12.5 12.75
5
0.0
2.4 4.0
0.8
0.8
Max
60
105
250
30
10
30
6.5
13.0
0.45
2.0
2.0
Units
µs
µs
µs
µs
µs
µs
ns
µs
µs
ns
ns
µs
mA
mA
°C
V
V
ns
V
V
V
V
Programming Waveforms
Program
Program
Verify
ADDRESS
2V
0.8V
Address N
tAS
DATA
2V
0.8V
Data In Stable
Add N
tDS tDH
Hi-Z
OE/VPP
CE
12.5V
0.8V
tPRT
2V
0.8V
tOES
tVCS
tPW
tOEH tVR
2V
0.8V
tDV
Data Out Valid Add N
tCF
tAH
VCC
6.0V
0V
DS008827-4
Note 11: Fairchild’s standard product warranty applies only to devices programmed to specifications described herein.
Note 12: VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP. The EPROM must not be inserted into or removed from a board with
voltage applied to VPP or VCC.
Note 13: The maximum absolute allowable voltage which may be applied to the VPP pin during programming is 14V. Care must be taken when switching the VPP supply to
prevent any overshoot from exceeding this 14V maximum specification. At least a 0.1 µF capacitor is required across VCC to GND to suppress spurious voltage transients which
may damage the device.
Note 14: Programming and program verify are tested with the fast Program Algorithm, at typical power supply voltages and timings.
NMC27C32B Rev. C
5 www.fairchildsemi.com

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