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PDF MXED101 Data sheet ( Hoja de datos )
| Número de pieza | MXED101 | |
| Descripción | 30V / 192-Channel OLED Display Driver | |
| Fabricantes | Clare. | |
| Logotipo |  |
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MXED101
30V, 192-Channel OLED Display Driver
Features:
• CMOS technology
• 192 Precision outputs
• Programmable output current control
• Optimized adjacent channel and chip-to-chip output
matching
• 3.3V or 5V logic supply voltage
• 55 MHz clock frequency
• Cascadable
• 30V output driver supply voltage
• Bi-directional data transfer
• Supports Grayscale, Binary, and Standby modes
• Low power consumption
• Package type: TCP (MXED101TP) and Die
(MXED101DI)
Ordering Information
Part #
MXED101
Description
30V, 192-Channel OLED
Display Driver
Block Diagram
General Description
The MXED101 is a 6-bit, 192-output column driver IC
designed to drive passive matrix full-color (RGB) and mono-
chrome Organic Light Emitting Diode (OLED) displays. Each
of the 192 current outputs is designed to act as a precision
high impedance current source. The MXED101 current source
output supply range is from 15 to 30V. The outputs are
arranged in a row on one side of the die with a pitch of 92
microns, which facilitates easy interface with the display.
The MXED101 consists of an Input Register, Transfer Latch,
Comparator, Bi-directional Shift Register, Counter, and 192
Programmable Current Outputs. The device has three 6-bit
input data buses, DA(5-0), DB(5-0), and DC(5-0), to accept
RGB or monochrome data. This data can be clocked through
the device at a maximum speed of 55 MHz with a 5V logic sup-
ply (40 MHz with a 3.3V logic supply).
The outputs of the MXED101 are arranged in three program-
mable interdigitized banks (A, B, and C) of 64 outputs each, a
bank for each color of the RGB data (programming the output
current is described in the Functional Description section). Bank
A controls outputs 1, 4, 7, …, 190; Bank B controls outputs 2, 5,
8, …, 191; and Bank C controls outputs 3, 6, 9, …, 192.
The MXED101 employs three methods to adjust display bright-
ness: a global gain voltage, a 3-bit digital control for each color,
and an external 10.8 KW resistor. In addition to these methods,
the relative brightness of each output can be controlled by on-
chip pulse width modulation. A standby signal (STBY) is provid-
ed to place the display in low power standby mode whenever it
is necessary.
SWC
DA(5-0)
DB(5-0)
DC(5-0)
CLKSH
DIRTKN
RTKNB
LTKNB
LE
CLKEX
STBY
SDM(1-0)
GG
GA(2-0)
GB(2-0)
GC(2-0)
RG
DS-MXED101-R9
192 X 6
Input
Register
64 x 1
Bi-
Direction
Shift
Register
192 x 6
Transfer
Latch
192 x 6
Comparator
Q1
Program- Q2
mable Q3 .
192- . .
channel . .
Output . .
Terminal Q192
Q1
Q2
Q3
Q192
6-Bit
Up
Counter
Output
Mapping/
Current
Programming
www.clare.com
1
1 page  
MXED101
Signal Definition (continued)
Name
RG
I/0/A
A
GA(2-0)
GB(2-0)
I
I
GC(2-0)
STBY
I
I
SDM(1-O) I
SWC I
TST(9-0)
TEST(2-0)
Q1-Q192
I
A
A
Description
Resistor Gain: Used to set the global current gain. A precision resistor shall be connected from this node to
analog ground which, in conjunction with the GG input voltage, sets up the base current level of the chip.
A Gain: Used to set the current on driver output channels 1,4,7,…,190. This input is internally pulled to a logic low.
B Gain: Used to set the current on driver output channels 2,5,8,…,191. This input is internally pulled to a
logic low.
C Gain: Used to set the current on driver output channels 3,6,9,…,192. This input is internally pulled to a logic low.
Standby Reset: Active high signal used to place the IC in a low power standby mode. When in the high state the IC
is non-functional and power dissipation is minimized. This input is internally pulled to a logic low.
Stripe/Diagonal/Mosaic: These input signals are used to modify the output channel current levels depending on
which row of the display is active. The falling edge of LE is used to modify the A, B, C channels. When the STBY is
set to a logic high, the A, B, C channel outputs are reset to their initial mapping. These inputs are internally pulled to
a logic high. (See the SDM function below).
Switch Channels: This input signal is used to control when the individual output channels are in the tri-state condition
(current is not sourced and the switch to ground is off). When the SWC input is in the high state, each output
channel turns the switch to ground on as soon as the data count is matched and current source disabled. When
SWC is in the low state, each channel remains in the tri-state condition from when the current source is disabled
until the counter equals 63. This input is internally pulled to a logic low.
These pins should be left open circuited.
These pins should be left open circuited.
OLED current source driver outputs.
Note: A= > analog, I= > digital input, O= > digital output
Rev. 9 www.clare.com
5
5 Page 
Application note:
CLKSH
LE
DA/DB/DC(5-0)
CLKEX
TGR
GA/GB/GC(2-0)
SWC
12V
GG
NOTE: DATA ORDER FOR DA/DB/DC (5-0) WOULD BE 1-192, 386-576, 577-768, 193-384
VCC DIRTKN
LTKNB
TOKEN BIT
MXED101
RTKNB LTKNB
MXED101
RTKNB
MXED101
ROW
DATA
NROWS
ORGANIC LIGHT EMITING DIODE ARRAY
768 X N ELEMENTS
DIRTKN
MXED101
RTKNB LTKNB
MXED101
RTKNB
Rev. 9 www.clare.com
11
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet MXED101.PDF ] | |
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