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PDF NJU6682 Data sheet ( Hoja de datos )
| Número de pieza | NJU6682 | |
| Descripción | 160-common x 132-segment DOT MATRIX LCD DRIVER FOR 4 GRAY SCALE | |
| Fabricantes | New Japan Radio | |
| Logotipo |  |
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128-common x 132-segment
BIT MAP LCD DRIVER
NJU6679
PRELIMINARY
GENERAL DESCRIPTION
PACKAGE OUTLINE
The NJU6679 is a bit map LCD driver to display graphics or charac-
ters. It contains 25,344 bits display data RAM, microprocessor inter-
face circuits, instruction decoder, 132-segment and 128-common driv-
ers.
The bit image display data is transferred to the display data RAM by
serial or 8-bit parallel interface.
The NJU6679 displays 128 x 132 dots graphics or 8-character 8-line
by 16 x 16 dots character.
It oscillates by built-in OSC circuit without any external components.
Furthermore, the NJU6679 features Partial Display Function which
creates up to 2 blocks of active display area and optimizes duty cycle
ratio. This function sets optimum boosted voltage by the combination
with both of programmable 6-time voltage booster circuit and 201-
step electrical variable resistor. As result, it reduces the operating cur-
rent.
The operating voltage from 2.4V to 3.6V and low operating current are
useful for small size battery operating items.
NJU6679CL
FEATURES
Direct Correspondence between Display Data RAM and LCD Pixel
Display Data RAM - 25,344 bits (1.5 times over than display size)
236 LCD Drivers - 128-common and 132-segment
Direct Microprocessor Interface for both of 68 and 80 type MPU
Serial Interface
Partial Display Function
(2 blocks of active display area and automatic duty cycle ratio selection)
Easy Vertical Scroll by the variable start line address and over size display data RAM
Programmable Bias selection ; 1/4,1/5,1/6,1/7,1/8,1/9,1/10,1/11,1/12 bias
Common Driver Order Assignment by mask option
Version C0 to C127(Pin name)
NJU6679A Com0 to Com127
NJU6679B Com127 to Com0
Useful Instruction Set
Display Data Read/Write, Display ON/OFF Cont, Inverse Display, Page Address Set,
Display Start Line Set, Partial Display, Bias Select, Column Address Set, Status Read,
All On/Off, Voltage Booster Circuits Multiple Select(Maximum 6-time), n-Line Inverse,
Read Modify Write, Power Saving, ADC Select, etc.
Power Supply Circuits for LCD; Programmable Voltage Booster Circuits(6-time Maximum),
Regulator, Voltage Follower x 4
Precision Electrical Variable Resistance
Low Power Consumption
Operating Voltage --- 2.4V to 3.6V
LCD Driving Voltage --- 6.0V to 18V
Package Outline --- COF / TCP / Bumped Chip
C-MOS Technology
JUL.10.2000
Ver. 2.1
1 page  
PAD No.
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
Terminal
S75
S76
S77
S78
S79
S80
S81
S82
S83
S84
S85
S86
S87
S88
S89
S90
S91
S92
S93
S94
S95
S96
S97
S98
S99
S100
S 101
S102
S103
S104
S105
S106
S107
S108
S109
S110
S111
S112
S113
S114
S115
S116
S117
S118
S119
S120
S 121
S122
S123
S124
X= um
-570
-630
-690
-750
-810
-870
-930
-990
-1050
-1110
-1170
-1230
-1290
-1350
-1410
-1470
-1530
-1590
-1650
-1710
-1770
-1830
-1890
-1950
-2010
-2070
-2130
-2190
-2250
-2310
-2370
-2430
-2490
-2550
-2610
-2670
-2730
-2790
-2850
-2910
-2970
-3030
-3090
-3150
-3210
-3270
-3330
-3390
-3450
-3510
Y= um
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
PAD No.
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
Terminal
S125
S126
S127
S128
S129
S130
S131
C127
C126
C125
C124
C123
C122
C121
C120
C119
C118
C117
C116
C115
C114
C113
C112
C111
C110
C109
C108
C107
C106
C105
C104
C103
C102
C101
C100
C99
C98
C97
C96
C95
C94
C93
C92
C91
C90
C89
C88
C87
C86
C85
NJU6679
X= um
-3570
-3630
-3690
-3750
-3810
-3870
-3930
-3990
-4050
-4110
-4170
-4230
-4290
-4350
-4410
-4470
-4530
-4590
-4650
-4710
-4770
-4830
-4890
-4950
-5010
-4995
-4995
-4995
-4995
-4995
-4995
-4995
-4995
-4995
-4995
-4995
-4995
-4995
-4995
-4995
-4995
-4995
-4995
-4995
-4995
-4995
-4995
-4995
-4995
-4995
Y= um
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1405
1284
1224
1164
1104
1044
984
924
864
804
744
684
624
564
504
444
384
324
264
204
144
84
24
-36
-96
-156
5 Page 
NJU6679
P a g e A d d re s s D A TA
D i s p la y P a tte rn
Line
Address
D 4 ,D 3 ,D 2 ,D 1 ,D 0
(0,0,0,0,0)
D 4 ,D 3 ,D 2 ,D 1 ,D 0
(0,0,0,0,1)
D 4 ,D 3 ,D 2 ,D 1 ,D 0
(0,0,0,1,0)
:
:
:
:
D 4 ,D 3 ,D 2 ,D 1 ,D 0
(1,0,0,0,1)
D 4 ,D 3 ,D 2 ,D 1 ,D 0
(1,0,0,1,0)
:
:
:
:
D 4 ,D 3 ,D 2 ,D 1 ,D 0
(1,0,1,1,1)
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
:
:
:
:
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
:
:
:
:
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
C o lum n
Addre-
ss
A D 0="0"
D
C D 0="1"
S e g m e n t O utput
Pege 0
Pege 1
Pege 2
:
:
:
:
Pege 17
Pege 18
:
:
:
:
Pege 23
|||||| | | ||
||| |||||||
00 01 02 03 04 05 06 07 08 09
7A 7B 7C 7D 7E 7F 80 81 82 83
83 82 81 80 7F 7E 7D 7C 7B 7A
09 08 07 06 05 04 03 02 01 00
0 12 34 5 6 7 8 9
122 123 124 125 126 127 128 129 130 131
Fig.1 Correspondence with Display Data RAM Address
00
01
02
03
04
05
06
07
08
09
0A
0B
0C
0D
0E
0F
10
11
12
13
14
15
16
17
18
19
:
:
:
:
86
87
88
89
8A
8B
8C
8D
8E
8F
90
91
92
93
94
95
96
97
98
99
:
:
:
:
B6
B7
B8
B9
BA
BB
BC
BD
BE
BF
F o r exam p le the
D i s p la y sta rt line
is 10H
C n Out
C0
C1
C2
C3
C4
C5
C6
C7
C8
C9
:
:
:
:
C 118
C 119
C120
C121
C122
C123
C124
C125
C126
C127
11 Page | ||
| Páginas | Total 46 Páginas | |
| PDF Descargar | [ Datasheet NJU6682.PDF ] | |
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