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PDF NE5565 Data sheet ( Hoja de datos )
| Número de pieza | NE5565 | |
| Descripción | Electronic ballast controller circuit | |
| Fabricantes | Philipss | |
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Philips Semiconductors
Electronic ballast controller circuit
Product specification
NE5565
DESCRIPTION
The Electronic Ballast controller chip has been designed in a bipolar
process. It is housed in a 20-lead dual-in-line plastic package. The
control chip contains the equivalent of two (2) switched mode power
supply control circuits. The first SMPS controller is a DC-to-DC
converter operating in the discontinuous current conduction mode.
It is used as a PFC in the ballast system to provide a DC voltage
step-up function, good AC power factor, low AC current harmonic
distortion, and circuit protection against some types of AC voltage
transients. The PFC uses pulse width modulation to control the
power transfer with an external MOS power transistor. The second
SMPS circuit is a half-bridge oscillator circuit. It converts the DC
output voltage of the PFC into a high frequency AC voltage for
operating lamps. Power transfer in this circuit is controlled by
changing the switch frequency. The half-bridge controller circuit is
capable of driving two external high voltage MOS power transistors
and it has circuits to regulate the lamp current, limit the peak lamp
voltage, and protect the power switches during fault conditions. This
electronic ballast controller circuit has the capability of being used in
a dimming application.
FEATURES:
• Complete PFC correction and dimming ballast control on one IC
• Low line current distortion PFC
ORDERING INFORMATION
DESCRIPTION
20-Pin Plastic Dual-In-Line Package (DIP)
PIN CONFIGURATION
N Package
CT 1
CP 2
DMAX 3
RT 4
RXCX 5
VLAMP 6
CRECT 7
LI2 8
LI 9
CSI 10
20 DCOUT
19 DC
18 OV
17 PF
16 VREF
15 IPRIM
14 OUTH
13 VCC
12 OUTP
11 GND
Figure 1. Pin Configuration
SL00524
• Selectable variable frequency modes
• Programmable pre-hit and ignition
• Lamp over-voltage protection
• PFC over-voltage protection for preventing over-shooting due to
load removal
TEMPERATURE RANGE
0 to +85°C
ORDER CODE
NE5565N
DWG #
SOT146-1
BLOCK DIAGRAM
1996 May 21
CRECT
LI2
LI
7
8
9
CSI 10
GND 11
OUTP 12
VCC 13
VLAMP
6
RXCX
RT
54
VCC
3 DMAX
2 CP
1 CT
14 15
OUTH IPRIM
16 17 18
VREF PF OV
Figure 2. Block Diagram
1
19
DC
20 DCOUT
SL00525
853-1835 16843
1 page  
Philips Semiconductors
Electronic ballast controller circuit
Product specification
NE5565
DC ELECTRICAL CHARACTERISTICS (continued)
SYMBOL
PARAMETER
TEST CONDITIONS
PWM (cont.)
DMAX input current
DMAX threshold
Power Supply
DMAX = 0.5V
VCC
VREF
Buffer
ISUPPLY static
Supply voltage
Reference voltage
VREF tolerance
VREF load current
IREF short circuit current
VCC = 12.7V
TRIMMED VALUE
0 to 85°C
VREF = 0V
OUTP / OUTH LOW
IPC = 40mA
IPC = 250mA PULSE
OUTP / OUTH HIGH
IPC = -40mA
IPC = -250mA PULSE
OUTP / OUTH peak triangle wave current
OUTP / OUTH pulse current
Low supply upper trip point
Magnetizing
Gate capacitance current
Low supply lower trip point
Lamp Voltage Regulator
VLAMP input current
VLAMP threshold
Load Protection
VLAMP = 6.5V
IPRIM input current
IPRlM negative threshold
Over-current Protection
IPRIM = 0V
CSI input current
CSI = -1V
CSI threshold
Rectifier (RLi = RLi2 = 4k, R3 = 20k; VRLi = Voltage input to RLi1; VRLi2 = 0V, Input to RLi2)
Li input current
VRLi1 = VRLi2 = 0V
CRECT output offset
CRECT HIGH output
CRECT gain
CRECT error amp reference
VRLi1 = VRLi2 = 0V
VRLi1 = ±0.5V
VRECT/VRLi1
LIMITS
UNITS
MIN TYP MAX
-1 µA
0.95 1.06 1.17
V
9 18 mA
9.3 14 V
7.42 V
±3.5 %
-5 mA
-30 mA
1
3
V
10.2
8.1
±40 mA
±250 mA
10.45 11.0 11.55
V
9.5 10.0 10.5 V
-8 µA
7.05 7.42 7.79
V
-60
-100
-140
µA
-60
-100
-140
mV
-60
-400
-100
-500
-140
-650
µA
mV
-120
4.42
8.86
2.01
-200
4.66
9.33
2.12
-280
150
4.9
9.80
2.23
µA
mV
V
V
1996 May 21
5
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet NE5565.PDF ] | |
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