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PDF 82801AB Data sheet ( Hoja de datos )

Número de pieza 82801AB
Descripción 82801AB (ICH0) I/O Controller Hub
Fabricantes Intel Corporation 
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No Preview Available ! 82801AB Hoja de datos, Descripción, Manual

Intel® 82801AA (ICH) and Intel®
82801AB (ICH0) I/O Controller
Hub
Datasheet
June 1999
Order Number: 290655-002

1 page




82801AB pdf
System Block Diagram
Processor
Graphics
Controller1
Host
Controller
Main
Memory
SMBus
Device(s)
SMBus
Hub Interface
PCI Bus
PCI Slots
AC'97 Codec(s)
(optional)
4 IDE Drives
AC'97 2.1
ATA/66 for ICH
ATA/33 for ICH0
I/O Controller Hub
- 82801AB (ICH0)
or
- 82801AA (ICH)
2xUSB
GPIO
PCI Agent
LPC I/F
ISA Bridge
(optional)
Super I/O
(required)
FWH
Keyboard, Mouse,
FD, PP, SP, IR
Note:
1. The 82801AB ICH0 is intended to be used with the Intel ® 82810 Graphics and Memory
Controller (GMCH) as the Host Controller. The graphics controller is integrated on the GMCH.
82801AA and 82801AB Datasheet
v

5 Page





82801AB arduino
7.1.13 SMLT—Secondary Master Latency Timer Register
(HUB-PCI—D30:F0) ........................................................................7-7
7.1.14 IOBASE—I/O Base Register (HUB-PCI—D30:F0) ..........................7-7
7.1.15 IOLIM—I/O Limit Register (HUB-PCI—D30:F0) ..............................7-7
7.1.16 SECSTS—Secondary Status Register (HUB-PCI—D30:F0)...........7-8
7.1.17 MEMBASE—Memory Base Register (HUB-PCI—D30:F0) .............7-9
7.1.18 MEMLIM—Memory Limit Register (HUB-PCI—D30:F0) .................7-9
7.1.19 PREF_MEM_BASE—Prefetchable Memory Base Register
(HUB-PCI—D30:F0) ........................................................................7-9
7.1.20 PREF_MEM_MLT—Prefetchable Memory Limit Register
(HUB-PCI—D30:F0) ......................................................................7-10
7.1.21 IOBASE_HI—I/O Base Upper 16 Bits Register
(HUB-PCI—D30:F0) ......................................................................7-10
7.1.22 IOLIM_HI—I/O Limit Upper 16 Bits Register
(HUB-PCI—D30:F0) ......................................................................7-10
7.1.23 INT_LINE—Interrupt Line Register (HUB-PCI—D30:F0) ..............7-10
7.1.24 BRIDGE_CNT—Bridge Control Register (HUB-PCI—D30:F0) .....7-11
7.1.25 CNF—ICH Configuration Register (HUB-PCI—D30:F0) ...............7-12
7.1.26 MTT—Multi-Transaction Timer Register (HUB-PCI—D30:F0) ......7-13
7.1.27 PCI_MAST_STS—PCI Master Status Register
(HUB-PCI—D30:F0) ......................................................................7-13
7.1.28 ERR_CMD—Error Command Register (HUB-PCI—D30:F0) ........7-14
7.1.29 ERR_STS—Error Status Register (HUB-PCI—D30:F0)................7-14
8 LPC Interface Bridge Registers (D31:F0) ..................................................................8-1
8.1 PCI Configuration Registers (D31:F0) ..........................................................8-1
8.1.1 VID—Vendor ID Register (LPC I/F—D31:F0) ..................................8-2
8.1.2 DID—Device ID Register (LPC I/F—D31:F0) ..................................8-2
8.1.3 PCICMD—PCI COMMAND Register (LPC I/F—D31:F0) ................8-3
8.1.4 PCISTA—PCI Device Status (LPC I/F—D31:F0) ............................8-4
8.1.5 RID—Revision ID Register (LPC I/F—D31:F0) ...............................8-5
8.1.6 PI—Programming Interface (LPC I/F—D31:F0) ..............................8-5
8.1.7 SCC—Sub-Class Code Register (LPC I/F—D31:F0) ......................8-5
8.1.8 BCC—Base-Class Code Register (LPC I/F—D31:F0) ....................8-5
8.1.9 HEADTYP—Header Type Register (LPC I/F—D31:F0) ..................8-5
8.1.10 PMBASE—ACPI Base Address (LPC I/F—D31:F0)........................8-6
8.1.11 ACPI_CNTL—ACPI Control (LPC I/F — D31:F0)............................8-6
8.1.12 BIOS_CNTL (LPC I/F—D31:F0) ......................................................8-7
8.1.13 TCO_CNTL — TCO Control (LPC I/F — D31:F0) ...........................8-7
8.1.14 GPIOBASE—GPIO Base Address (LPC I/F—D31:F0) ...................8-8
8.1.15 GPIO_CNTL—GPIO Control (LPC I/F—D31:F0) ............................8-8
8.1.16 PIRQ[n]_ROUT—PIRQ[A,B,C,D] Routing Control
(LPC I/F—D31:F0) ...........................................................................8-9
8.1.17 SERIRQ_CNTL—Serial IRQ Control (LPC I/F—D31:F0) ................8-9
8.1.18 D31_ERR_CFG—Device 31 Error Config Register
(LPC I/F—D31:F0) .........................................................................8-10
8.1.19 D31_ERR_STS—Device 31 Error Status Register
(LPC I/F—D31:F0) .........................................................................8-10
8.1.20 PCI_DMA_CFG—PCI DMA Configuration (LPC I/F—D31:F0) .....8-11
8.1.21 GEN_CNTL — General Control Register (LPC I/F — D31:F0) .....8-11
8.1.22 GEN_STA—General Status (LPC I/F—D31:F0)............................8-13
8.1.23 RTC_CONF—RTC Configuration Register (LPC I/F—D31:F0).....8-14
82801AA and 82801AB Datasheet
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