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PDF MAX1620 Data sheet ( Hoja de datos )
| Número de pieza | MAX1620 | |
| Descripción | Digitally Adjustable LCD Bias Supplies | |
| Fabricantes | Maxim Integrated | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de MAX1620 (archivo pdf) en la parte inferior de esta página. Total 20 Páginas | ||
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19-1214; Rev 1; 1/98
EVFAOLLULAOTWIOSNDKAITTAMSAHNEUEATL
Digitally Adjustable LCD Bias Supplies
General Description
The MAX1620/MAX1621 convert a 1.8V to 20V battery
voltage to a positive or negative LCD backplane bias
voltage. Backplane bias voltage can be automatically
disabled when the display logic voltage is removed,
protecting the display. These devices use very little PC
board area, come in ultra-small QSOP packages, and
require only small, low-profile external components.
Output voltage can be set to a desired positive or nega-
tive voltage range with external resistors, and adjusted
over that range with the on-board digital-to-analog con-
verter (DAC) or with a potentiometer. The MAX1620/
MAX1621 include a 5-bit DAC, allowing digital software
control of the bias voltage. The MAX1620 uses up/down
digital signaling to adjust the DAC, and the MAX1621
uses the System Management Bus (SMBus™) 2-wire
serial interface.
These devices use a low-cost, external, N-channel MOSFET
power switch or NPN transistor, and can be configured
for positive or negative output voltages. Operating cur-
rent is a low 150µA, typically provided from a display’s
logic supply of 3.0V to 5.5V. The MAX1620/MAX1621 are
available in a 16-pin QSOP package.
Features
o 1.8V to 20V Battery Input Voltage
o Automatic Disable when Display Logic
is Shut Down
o Extremely Small QSOP Package
o 32-Level Internal DAC
o SMBus Serial Interface (MAX1621)
o Positive or Negative Output Voltage
PART
MAX1620EEE
MAX1621EEE
Ordering Information
TEMP. RANGE
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
16 QSOP
16 QSOP
Applications
Notebook Computers
Palmtop Computers
Personal Digital Assistants
Portable Data-Collection Terminals
Pin Configuration
TOP VIEW
DN (SDA) 1
UP (SCL) 2
BATT 3
SHDN (SUS) 4
POK 5
REF 6
POL 7
LCDON 8
MAX1620
MAX1621
( ) ARE FOR MAX1621 ONLY.
QSOP
16 DHI
15 DLO
14 LX
13 PGND
12 AGND
11 VDD
10 DOUT
9 FB
Typical Operating Circuit
2V TO
12V
3V TO
5.5V
ON/OFF
DOWN
UP
BATT
VDD LX
POL DHI
SHDN
DN
UP
DLO
PGND
MAX1620
REF DOUT
AGND
FB
POK LCDON
12.5V
TO
23.5V OUT
SMBus is a trademark of Intel Corp.
________________________________________________________________ Maxim Integrated Products 1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.
For small orders, phone 1-800-835-8769.
1 page  
Digitally Adjustable LCD Bias Supplies
TIMING CHARACTERISTICS
(VDD = 3.3V, VBATT = 10V, TA = -40°C to +85°C. Typical values are at TA = +25°C, unless otherwise noted. Limits over this
temperature range are guaranteed by design.)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
MAX1620 (Figure 1)
Pulse Width High (UP, DN)
Pulse Width Low (UP, DN)
Pulse Separation (UP, DN)
Counter Reset Time
MAX1621 (Figures 2 and 3)
t1
t2
t3
t4
1 µs
1 µs
1 µs
1 µs
SDA_ to SCL_ Data-Setup Time
SCL_ to SDA_ Data-Hold Time
SCL/SDA Rise Time
SCL/SDA Fall Time
SCL Low Time
SCL High Time
tSU:DAT
tHD:DAT
tR
tF
tLOW
tHIGH
500 ns
0 ns
1 µs
300 ns
4.7 µs
4 µs
Start Condition SCL_ to SDA_
Setup Time
tSU:STA
4.7 µs
Start Condition SDA_ to SCL_
Hold Time
tHD:STA
4 µs
Stop Condition SCL_ to SDA_
Setup Time
tSU:STO
4 µs
SCL Falling Time to SDA Valid
Master Clocking in Data
tDV
1 µs
Note 1: The setting in the DAC is guaranteed to remain valid as long as VDD is greater than the UVLO threshold.
Note 2: BATT Operating Range is guaranteed by the Microsecond-Volt Time Constant specification.
Note 3: Current sourced from a pin is denoted as positive current. Current sunk into a pin is denoted as negative current.
Note 4: Guaranteed by design.
__________________________________________Typical Operating Characteristics
(VDD = 5V, VBATT = 10V, L1 = 100µH, TA = +25°C, unless otherwise noted.)
EFFICIENCY vs. OUTPUT CURRENT
1.00
0.95
+15V
0.90
+25V
0.85
0.80
0.75
0.70
0
10 20 30 40 50 60 70
OUTPUT CURRENT (mA)
EFFICIENCY vs. OUTPUT CURRENT
1.00
0.95
0.90
-25V
0.85
-15V
0.80
0.75
0.70
0
10 20 30 40 50 60
OUTPUT CURRENT (mA)
70
EFFICIENCY vs. OUTPUT VOLTAGE
1.00
0.95
0.90 +10mA
+20mA
0.85
0.80
0.75
0.70
12 14 16 18 20 22 24 26
OUTPUT VOLTAGE (V)
_______________________________________________________________________________________ 5
5 Page 
Digitally Adjustable LCD Bias Supplies
2V
TO
15V
3V
TO C1
5.5V 0.1µF
C2
0.1µF
R8
10k
D3 1N6263 (ANY SCHOTTKY)
TO REF
3
5 BATT
U1
14
LX 16
11 POK
DHI 15
7 VDD
4 POL
MAX1620
MAX1621
DLO 13
PGND
1 SHDN (SUS)
10
DN (SDA)
2
DOUT 9
UP (SCL)
6
FB
REF
12 AGND
8
LCDON
C3
22µF
R3
300k
( ) ARE FOR MAX1621.
NOTE: CONNECTIONS TO DIGITAL INPUTS NOT SHOWN.
Figure 5. Typical Operating Circuit—Negative Output
2V
TO
12V
3V
TO C1
5.5V 0.1µF
C2
0.1µF
R8
10k
D3 1N6263 (ANY SCHOTTKY)
TO REF
3
5 BATT
U1
14
LX 16
11 POK
DHI 15
7 VDD
4 POL
MAX1620
MAX1621
DLO 13
PGND
1 SHDN (SUS)
10
2 DN (SDA)
DOUT 9
6 UP (SCL)
FB
REF
12 AGND
8
LCDON
C3
22µF
R3
300k
( ) ARE FOR MAX1621.
NOTE: CONNECTIONS TO DIGITAL INPUTS NOT SHOWN.
Figure 6. Alternative Negative Output—Maximum Voltage
L1
100µH
D1
MBRS0540
C4
1µF
N1
MMFT3055VL
D2
MBRS0540
R5
1.2M
C5
22µF
R4
300k
C6
100pF
L1
100µH
C4
2.2µF
N1
MMFT3055VL
D2
MBRS0540
D1
MBRS0540
R5
2.7M
C5
22µF
R4
300k
C6
100pF
-6V
TO
-12V OUT
-13.5V
TO
-27V OUT
maximum switching frequency. The following equation
represents the output current for the ideal case (no
power losses) of Figure 5:
IOUT
=
1
2
x (k - factor / L) x VBATT / (VBATT + VOUT)
This means that a higher peak current is required to
achieve the same output current in the negative output
circuit as in the positive output circuit.
The output current for Figure 6 uses the same current
equation as the positive boost.
Output Voltage Control
The output voltage is set with a voltage divider to the
feedback pin (FB). For a positive output, the divider is
referred to GND; for a negative output, the divider is
referred to REF.
Output voltage can be adjusted with an internal DAC
summing current into FB through an external resistor.
The 5-bit DAC is controlled with a user-programmable
up/down counter. On power-up or after a reset, the
counter sets the DAC output to 10000 binary, or half-
scale.
______________________________________________________________________________________ 11
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet MAX1620.PDF ] | |
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