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PDF MAX1416 Data sheet ( Hoja de datos )
| Número de pieza | MAX1416 | |
| Descripción | 16-Bit / Low-Power / 2-Channel / Sigma-Delta ADCs | |
| Fabricantes | Maxim Integrated | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de MAX1416 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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MAX1415/MAX1416
EVALUATION KIT AVAILABLE
16-Bit, Low-Power, 2-Channel,
Sigma-Delta ADCs
General Description
The MAX1415/MAX1416 low-power, 2-channel, serial-
output analog-to-digital converters (ADCs) use a sigma-
delta modulator with a digital filter to achieve 16-bit
resolution with no missing codes. These ADCs are
pin-compatible upgrades to the MX7705/AD7705. The
MAX1415/MAX1416 feature an internal oscillator (1MHz
or 2.4576MHz), an on-chip input buffer, and a program-
mable gain amplifier (PGA). The devices offer an SPI-/
QSPI™-/MICROWIRE®-compatible serial interface.
The MAX1415/MAX1416 are available in 16-pin PDIP,
SO, and TSSOP packages.
Applications
●● Industrial Instruments
●● Weigh Scales
●● Strain-Gauge Measurements
●● Loop-Powered Systems
●● Flow and Gas Meters
●● Medical Instrumentation
●● Pressure Transducers
●● Thermocouple Measurements
●● RTD Measurements
Ordering Information continued at end of data sheet.
Functional Diagram
Benefits and Features
●● Improve Measurement Quality with Excellent DC
Accuracy
• 16-Bit Sigma-Delta ADC with Two Fully-Differential
Input Channels
• 0.0015% INL (max) with No Missing Codes
●● Minimize Power Consumption with Low-Power
Dissipation
• 1.2mW (max) 3V supply
• 2μA (typ) Power-Down Current
●● Lower System Cost with Integrated Functionality
• PGA with 1 to 128 Programmable Gain
• Optional Input Buffers
• > 98dB 50Hz/60Hz Rejection
●● Increase System Accuracy with Built-in Self
Calibration
• On-Demand Offset and Gain Self-Calibration and
System Calibration
• User-Programmable Offset and Gain Registers
●● Flexible Single-Supply Options
• 2.7V to 3.6V (MAX1415)
• 4.75V to 5.25V (MAX1416)
●● Pin Compatible Upgrades for MX7705/AD7705
AIN1+
AIN1-
AIN2+
AIN2-
REF+
REF-
BUFFER
MAX1415
MAX1416
CLOCK
GENERATOR
MUX
S1
S2
2nd-ORDER
PGA SIGMA-DELTA
MODULATOR
DIGITAL
FILTER
BUFFER
S1 AND S2 ARE OPEN IN
BUFFERED MODE AND CLOSED
IN UNBUFFERED MODE
SERIAL INTERFACE,
REGISTERS,
AND
CONTROL
QSPI is a trademark of Motorola, Inc.
MICROWIRE is a registered trademark of National Semiconductor Corp.
CLKIN
CLKOUT
VDD
GND
CS
SCLK
DIN
DOUT
DRDY
RESET
19-3163; Rev 3; 6/15
1 page  
MAX1415/MAX1416
16-Bit, Low-Power, 2-Channel,
Sigma-Delta ADCs
Electrical Characteristics—MAX1415 (continued)
(VDD = 3V, VGND = 0V, VREF+ = 1.225V, VREF- = GND, external fCLKIN = 2.4576MHz, CLKDIV bit = 0, CREF+ to GND = 0.1μF, CREF-
to GND = 0.1μF, TA = TMIN to TMAX, unless otherwise noted.)
PARAMETER
Typical Conversion-Time Variation
SYMBOL
CONDITIONS
∆tCONV tCONV = 1/ODR
MIN TYP MAX UNITS
±0.5
%
Timing Characteristics—MAX1415
(Note 16) (Figures 8, 9)
PARAMETER
DRDY High Time
Reset Pulse-Width Low
DRDY Fall to CS Fall Setup Time
CS Fall to SCLK Rise Setup Time
SCLK Fall to DOUT Valid Delay
SCLK Pulse-Width High
SCLK Pulse-Width Low
CS Rise to SCLK Rise Hold Time
Bus Relinquish Time After SCLK
Rising Edge
SCLK Fall to DRDY Rise Delay
DIN to SCLK Setup Time
DIN to SCLK Hold Time
SYMBOL
t1
t2
t3
t4
t5
t6
t7
t8
t9
t10
CONDITIONS
MIN
500/
fCLKIN
100
0
120
0
100
100
0
TYP
30
20
MAX UNITS
s
ns
ns
ns
100 ns
ns
ns
ns
100 ns
100 ns
ns
ns
Electrical Characteristics—MAX1416
(VDD = 5V, VGND = 0V, VREF+ = 2.5V, VREF- = GND, fCLKIN = 2.4576MHz, CLKDIV bit = 0, CREF+ to GND = 0.1μF, CREF- to GND =
0.1μF, TA = TMIN to TMAX, unless otherwise noted.)
PARAMETER
DC ACCURACY
Resolution (No Missing Codes)
Output Noise
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
16
(Tables 1, 3)
Bits
µV
Integral Nonlinearity
INL Gain = 1, bipolar mode, unbuffered
±0.0015 %FSR
Unipolar Offset Error
Unipolar Offset Drift
Bipolar Zero Error
After calibration
(Note 2)
After calibration
(Note 1)
0.5
(Note 1)
µV
µV/°C
µV
Bipolar Zero Drift (Note 2)
Gain = 1 to 4
Gain = 8 to 128
0.5
µV/°C
0.1
www.maximintegrated.com
Maxim Integrated │ 5
5 Page 
MAX1415/MAX1416
16-Bit, Low-Power, 2-Channel,
Sigma-Delta ADCs
Table 2. MAX1415—Peak-to-Peak Resolution vs. Gain and Output Data Rate
FILTER FIRST
NOTCH AND OUTPUT
DATA
RATE (Hz)
-3dB FREQUENCY
(Hz)
BUFFERED (fCLKIN = 1MHz)
20
5.24
25 6.55
100 26.2
200 52.4
UNBUFFERED (fCLKIN = 1MHz)
20 5.24
25 6.55
100 26.2
200 52.4
BUFFERED (fCLKIN = 2.4576MHz)
50 13.1
60 15.72
250 65.5
500 131
UNBUFFERED (fCLKIN = 2.4576MHz)
50 13.1
60 15.72
250 65.5
500 131
1
16
16
12
10
16
16
12
10
16
16
12
10
16
16
12
10
TYPICAL PEAK-TO-PEAK RESOLUTION (BITS)
GAIN
2 4 8 16 32 64
16 16 16 15 14 13
16 16 12 15 14 13
12 12 16 12 12 11
10 10 10 10 10 10
16 16 16 15 14 13
16 16 16 15 14 13
12 12 12 12 12 12
10 10 10 10 10 10
16 16 15 15 14 13
16 16 15 14 13 12
12 12 12 12 12 11
10 10 10 10 10 10
16 16 16 15 14 13
16 16 16 15 14 13
12 12 12 12 12 12
10 10 10 10 10 10
128
12
12
11
9
12
12
11
9
12
11
10
9
12
12
11
9
www.maximintegrated.com
Maxim Integrated │ 11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MAX1416.PDF ] | |
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