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PDF MAX1284 Data sheet ( Hoja de datos )

Número de pieza MAX1284
Descripción Serial 12-Bit ADCs
Fabricantes Maxim Integrated 
Logotipo Maxim Integrated Logotipo



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19-1687; Rev 2; 12/10
EVAALVUAAILTAIOBNLEKIT
400ksps/300ksps, Single-Supply, Low-Power,
Serial 12-Bit ADCs with Internal Reference
General Description
The MAX1284/MAX1285 12-bit analog-to-digital con-
verters (ADCs) combine a high-bandwidth track/hold
(T/H), a serial interface with high conversion speed, an
internal +2.5V reference, and low power consumption.
The MAX1284 operates from a single +4.5V to +5.5V
supply. The MAX1285 operates from a single +2.7V to
+3.6V supply.
The 3-wire serial interface connects directly to
SPI™/QSPI™/ MICROWIRE™ devices without external
logic. The devices use an external serial-interface clock
to perform successive-approximation analog-to-digital
conversions.
Low power, ease of use, and small package size make
these converters ideal for remote-sensor and data-acqui-
sition applications or for other circuits with demanding
power consumption and space requirements. The
MAX1284/MAX1285 are available in 8-pin SO packages.
These devices are pin-compatible, higher-speed ver-
sions of the MAX1240/MAX1241. Refer to the respec-
tive data sheets for more information.
Applications
Portable Data Logging
Data Acquisition
Medical Instruments
Battery-Powered Instruments
Pen Digitizers
Process Control
____________________________Features
o Single-Supply Operation
+4.5V to +5.5V (MAX1284)
+2.7V to +3.6V (MAX1285)
o ±1LSB (max) DNL, ±1LSB (max) INL
o 400ksps Sampling Rate (MAX1284)
o Internal Track/Hold
o +2.5V Internal Reference
o Low Power: 2.5mA (400ksps)
o SPI/QSPI/MICROWIRE 3-Wire Serial-Interface
o Pin-Compatible, High-Speed Upgrades to
MAX1240/MAX1241
o 8-Pin SO Package
Ordering Information
PART
TEMP RANGE
PIN-
PACKAGE
SUPPLY
VOLTAGE (V)
MAX1284BCSA+ 0°C to +70°C 8 SO
5
MAX1284BESA+ -40°C to +85°C 8 SO
5
MAX1285BCSA+ 0°C to +70°C 8 SO
2.7 to 3.6
MAX1285BESA+ -40°C to +85°C 8 SO
2.7 to 3.6
+Denotes a lead(Pb)-free/RoHS-compliant package.
Pin Configuration
TOP VIEW
+
VDD 1
AIN 2
SHDN 3
REF 4
MAX1284
MAX1285
SO
8 SCLK
7 CS
6 DOUT
5 GND
CS
SCLK
7
8
SHDN 3
AIN 2
Functional Diagram
VDD
1
CONTROL
LOGIC
T/H
INT
CLOCK
12-BIT
SAR
OUTPUT
SHIFT
REGISTER
6 DOUT
SPI and QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
4
REF
+2.5V REFERENCE
5
GND
MAX1284
MAX1285
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.

1 page




MAX1284 pdf
400ksps/300ksps, Single-Supply, Low-Power,
Serial 12-Bit ADCs with Internal Reference
TIMING CHARACTERISTICS—MAX1284 (Figures 1, 2, 8, 9)
(VDD = +4.5V to +5.5V, TA = TMIN to TMAX, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
SCLK Period
tCP
SCLK Pulse-Width High
SCLK Pulse-Width Low
CS Fall to SCLK Rise Setup
SCLK Rise to CS Rise Hold
SCLK Rise to CS Fall Ignore
CS Rise to SCLK Rise Ignore
tCH
tCL
tCSS
tCSH
tCSO
tCS1
SCLK Rise to DOUT Hold
SCLK Rise to DOUT Valid
CS Rise to DOUT Disable
CS Fall to DOUT Enable
CS Pulse-Width High
tDOH
tDOV
tDOD
tDOE
tCSW
CLOAD = 20pF
CLOAD = 20pF
CLOAD = 20pF
CLOAD = 20pF
MIN TYP MAX
156
62
62
35
0
35
35
10
80
10 65
65
100
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
TIMING CHARACTERISTICS—MAX1285 (Figures 1, 2, 8, 9)
(VDD = +2.7V to +3.6V, TA = TMIN to TMAX, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
SCLK Period
tCP
SCLK Pulse-Width High
tCH
SCLK Pulse-Width Low
CS Fall to SCLK Rise Setup
SCLK Rise to CS Rise Hold
SCLK Rise to CS Fall Ignore
CS Rise to SCLK Rise Ignore
tCL
tCSS
tCSH
tCSO
tCS1
SCLK Rise to DOUT Hold
SCLK Rise to DOUT Valid
CS Rise to DOUT Disable
CS Fall to DOUT Enable
CS Pulse-Width High
tDOH
tDOV
tDOD
tDOE
tCSW
CLOAD = 20pF
CLOAD = 20pF
CLOAD = 20pF
CLOAD = 20pF
MIN TYP MAX
208
83
83
45
0
45
45
13
100
13 85
85
100
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note 1: Tested at VDD = VDD(MIN).
Note 2: Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale range has
been calibrated.
Note 3: Internal reference, offset, and reference errors nulled.
Note 4: Conversion time is defined as the number of clock cycles multiplied by the clock period; clock has 50% duty cycle.
Note 5: External load should not change during conversion for specified accuracy. Guaranteed specification limit of 2mV/mA due to
production test limitations.
Note 6: Electrical characteristics are guaranteed from VDD(MIN) to VDD(MAX). For operations beyond this range, see Typical
Operating Characteristics.
Note 7: MAX1284 tested with 20pF on DOUT and fSCLK = 6.4MHz, 0 to 5V. MAX1285 tested with same loads, fSCLK = 4.8MHz,
0 to 3V. DOUT = full scale.
_______________________________________________________________________________________ 5

5 Page





MAX1284 arduino
400ksps/300ksps, Single-Supply, Low-Power,
Serial 12-Bit ADCs with Internal Reference
1.50
CREF = 4.7μF
1.25
1.00
0.75
0.50
0.25
0
0.0001
0.001 0.01 0.1
1
TIME IN SHUTDOWN (s)
10
Figure 7. Reference Power-Up vs. Time in Shutdown
Applications Information
Connection to Standard Interfaces
The MAX1284/MAX1285 serial interface is fully compat-
ible with SPI/QSPI and MICROWIRE (Figure 11).
If a serial interface is available, set the CPU’s serial interface
in master mode so the CPU generates the serial clock.
Choose a clock frequency up to 6.4MHz (MAX1284) or
4.8MHz (MAX1285).
1) Use a general-purpose I/O line on the CPU to pull CS
low. Keep SCLK low.
2) Activate SCLK for a minimum of fifteen clock cycles.
The first two clocks produce zeros at DOUT. DOUT
output data transitions 20ns after the third SCLK rising
edge and is available in MSB-first format. Observe the
CS
SCLK
DOUT HIGH-Z
1
34
8 12 15
D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
HIGH-Z
A/D STATE
ACQ
HOLD/CONVERT
ACQUISITION
Figure 8. Interface Timing Sequence
CS
SCLK
ttCCSSOO
tCSS
tCL tCH
tCP
DOUT
tDOH
tDOE tDOV
tCSW
tCSH tCSI
tDOD
Figure 9. Detailed Serial-Interface Timing
______________________________________________________________________________________ 11

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