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PDF MAX1205 Data sheet ( Hoja de datos )
| Número de pieza | MAX1205 | |
| Descripción | 14-Bit Self-Calibrating ADC | |
| Fabricantes | Maxim Integrated | |
| Logotipo |  |
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19-4794; Rev 0; 11/98
EVAALVUAAILTAIOBNLEKIT
+5V Single-Supply, 1Msps, 14-Bit
Self-Calibrating ADC
General Description
The MAX1205 is a 14-bit, monolithic, analog-to-digital
converter (ADC) capable of conversion rates up to
1Msps. This integrated circuit, built on a CMOS pro-
cess, uses a fully differential, pipelined architecture
with digital error correction and a short self-calibration
procedure that corrects for capacitor and gain mis-
matches and ensures 14-bit linearity at full sample
rates. An on-chip track/hold (T/H) maintains superb
dynamic performance up to the Nyquist frequency. The
MAX1205 operates from a single +5V supply.
The fully differential inputs allow an input swing of
±VREF. The reference is also differential, with the posi-
tive reference (RFPF) typically connected to +4.096V
and the negative reference (RFNF) connected to ana-
log ground. Additional sensing pins (RFPS, RFNS) are
provided to compensate for any resistive-divider action
that may occur due to finite internal and external resis-
tances in the reference traces and the on-chip resis-
tance of the reference pins. A single-ended input is
also possible using two operational amplifiers.
The power dissipation is typically 257mW at +5V, at a
sampling rate of 1Msps. The device employs a CMOS-
compatible, 14-bit parallel, two’s complement output
data format. For higher sampling rates, the MAX1201 is
a 2.2Msps pin-compatible upgrade to the MAX1205.
The MAX1205 is available in an MQFP package, and
operates over the commercial (0°C to +70°C) and the
extended (-40°C to +85°C) temperature ranges.
Features
o Monolithic, 14-Bit, 1Msps ADC
o +5V Single Supply
o SNR of 80dB for fIN = 500kHz
o SFDR of 87dB for fIN = 500kHz
o Low Power Dissipation: 257mW
o On-Demand Self-Calibration
o Differential Nonlinearity Error: ±0.3LSB
o Integral Nonlinearity Error: ±1.2LSB
o Three-State, Two’s Complement Output Data
PART
MAX1205CMH
MAX1205EMH
Ordering Information
TEMP. RANGE
0°C to +70°C
-40°C to +85°C
PIN-PACKAGE
44 MQFP
44 MQFP
TOP VIEW
Pin Configuration
Imaging
Communications
Medical
Scanners
Data Acquisition
Applications
ST_CAL
AGND
AVDD
AGND
AGND
AVDD
DOR
D13
D12
D11
D10
1
2
3
4
5
6
7
8
9
10
11
MAX1205
33 OE
32 DAV
31 CLK
30 DVDD
29 DGND
28 DGND
27 DVDD
26 TEST1
25 TEST2
24 TEST3
23 D0
MQFP
________________________________________________________________ Maxim Integrated Products 1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.
For small orders, phone 1-800-835-8769.
1 page  
+5V Single-Supply, 1Msps, 14-Bit
Self-Calibrating ADC
Typical Operating Characteristics
(AVDD = +5V ±5%, DVDD = DRVDD = +3.3V, VRFPS = +4.096V, VRFNS = AGND, VCM = +2.048V, differential input, fCLK= 2.048MHz,
calibrated, TA = +25°C, unless otherwise noted.)
INTEGRAL NONLINEARITY vs.
TWO’S COMPLEMENT OUTPUT CODE
1.25
1.00
0.75
0.50
0.25
0
-0.25
-0.50
-0.75
-1.00
-1.25
-8192 -6144 -4096 -2048 0 2048 4096 6144 8192
TWO’S COMPLEMENT OUTPUT CODE
DIFFERENTIAL NONLINEARITY vs.
TWO’S COMPLEMENT OUTPUT CODE
1.0
0.5
0
-0.5
-1.0
-8192 -6144 -4096 -2048 0 2048 4096 6144 8192
TWO’S COMPLEMENT OUTPUT CODE
SINGLE-TONE SPURIOUS-FREE DYNAMIC RANGE
vs. INPUT AMPLITUDE (fIN = 99.5kHz)
120
110 dBFS
100
90
80
70
60
dBc
50
40
30
-80 -70 -60 -50 -40 -30 -20 -10
INPUT AMPLITUDE (dBFS)
0
SIGNAL-TO-NOISE RATIO PLUS
DISTORTION vs. INPUT FREQUENCY
84
AIN = -0.5dBFS
82
80
78
AIN = -6dBFS
76
74
72
70
68
66
AIN = -20dBFS
64
1 10
100
INPUT FREQUENCY (kHz)
1000
TOTAL HARMONIC DISTORTION
vs. INPUT FREQUENCY
-76
-78
-80
-82
-84
-86
-88
-90
1
AIN = -20dBFS
AIN = -6dBFS
AIN = -0.5dBFS
10 100
INPUT FREQUENCY (kHz)
1000
SIGNAL-TO-NOISE RATIO
vs. INPUT FREQUENCY
85
AIN = -0.5dBFS
80
AIN = -6dBFS
75
70
65
60
1
AIN = -20dBFS
10 100
INPUT FREQUENCY (kHz)
1000
SIGNAL-TO-NOISE RATIO PLUS DISTORTION
vs. SAMPLING RATE (fIN = 99.5kHz)
85
AIN = -0.5dBFS
84
83
82
81
80
0.1
1
SAMPLE RATE (Msps)
TYPICAL FFT
(fIN = 99.5kHz, 2048 VALUE RECORD)
-15
-30
-45
-60
-75
-90
-105
-120
-135
0
0
100 200 300 400 500 600
FREQUENCY (kHz)
_______________________________________________________________________________________ 5
5 Page 
+5V Single-Supply, 1Msps, 14-Bit
Self-Calibrating ADC
Two’s Complement Output
The MAX1205 outputs data in two’s complement for-
mat. Table 1 shows how to convert the various full-
scale inputs into their two’s complement output codes.
Applications Information
Signal-to-Noise Ratio (SNR)
For a waveform perfectly reconstructed from digital
samples, the theoretical maximum SNR is the ratio of
full-scale analog input (RMS value) to the RMS quanti-
zation error (residual error). The ideal, theoretical mini-
mum analog-to-digital noise is caused by quantization
error only and results directly from the ADC’s resolution
(N bits):
SNR(MAX) = (6.02N + 1.76)dB
In reality, there are other noise sources besides quanti-
zation noise including thermal noise, reference noise,
clock jitter, etc. Therefore, SNR is computed by taking
the ratio of the RMS signal to the RMS noise, which
includes all spectral components minus the fundamen-
tal, the first nine harmonics, and the DC offset.
Signal-to-Noise Plus Distortion (SINAD)
SINAD is the ratio of the fundamental input frequency’s
RMS amplitude to all other ADC output signals:
SINAD (dB) = 20log [(SignalRMS / (Noise +
Distortion)RMS]
Effective Number of Bits (ENOB)
ENOB indicates the global accuracy of an ADC at a
specific input frequency and sampling rate. An ideal
ADC’s error consists of quantization noise only. With an
input range equal to the full-scale range for the ADC,
Table 1. Two’s Complement Conversion
SCALE
+FSR - 1LSB
+3/4FSR
+1/2FSR
+1/4FSR
+0
-0
-1/4FSR
-1/2FSR
-3/4FSR
-FSR + 1LSB
-FSR
OFFSET BINARY
1111....1111
1110....0000
1100....0000
1010....0000
1000....0000
—
0110....0000
0100....0000
0010....0000
0000....0001
0000....0000
the effective number of bits can be calculated as fol-
lows:
ENOB = (SINAD - 1.76) / 6.02
Total Harmonic Distortion (THD)
THD is the ratio of the RMS sum of the first nine har-
monics of the input signal to the fundamental itself. This
is expressed as:
V2
2
+ V3 2
+ V4 2
+
⋅
⋅
⋅
+
V9
2
THD = 20log
V1
where V1 is the fundamental amplitude, and V2 through
V9 are the amplitudes of the 2nd through 9th order har-
monics.
Spurious-Free
Dynamic Range (SFDR)
SFDR is the ratio of RMS amplitude of the fundamental
(maximum signal component) to the RMS value of the
next largest spurious component, excluding DC offset.
Grounding and
Power-Supply Decoupling
Grounding and power-supply decoupling strongly influ-
ence the performance of the MAX1205. At 14-bit reso-
lution, unwanted digital crosstalk may couple through
the input, reference, power-supply, and ground con-
nections; this adversely affects the SNR or SFDR. In
addition, electromagnetic interference (EMI) can either
couple into or be generated by the MAX1205.
Therefore, grounding and power-supply decoupling
guidelines should be closely followed.
TWO’S COMPLEMENT
0111....1111
0110....0000
0100....0000
0010....0000
0000....0000
—
1110....0000
1100....0000
1010....0000
1000....0001
1000....0000
ONE’S COMPLEMENT
0111....1111
0110....0000
0100....0000
0010....0000
0000....0000
1111....1111
1101....1111
1011....1111
1001....1111
1000....0000
—
______________________________________________________________________________________ 11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet MAX1205.PDF ] | |
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