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Numéro de référence | M74HC166 | ||
Description | 8 BIT PISO SHIFT REGISTER | ||
Fabricant | ST Microelectronics | ||
Logo | |||
1 Page
M74HC166
8 BIT PISO SHIFT REGISTER
s HIGH SPEED :
fMAX = 63 MHz (TYP.) at VCC = 6V
s LOW POWER DISSIPATION:
ICC =4µA(MAX.) at TA=25°C
s HIGH NOISE IMMUNITY:
VNIH = VNIL = 28 % VCC (MIN.)
s SYMMETRICAL OUTPUT IMPEDANCE:
DIP
SOP
TSSOP
|IOH| = IOL = 4mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
)s WIDE OPERATING VOLTAGE RANGE:
t(sVCC (OPR) = 2V to 6V
s PIN AND FUNCTION COMPATIBLE WITH
uc74 SERIES 166
rodDESCRIPTION
PThe M74HC166 is an high speed CMOS 8 BIT
PISO SHIFT REGISTER fabricated with silicon
tegate C2MOS technology.
leIt consists of parallel or serial inputs and a
oserial-out 8 bit shift register with gated clock inputs
sand an overriding clear input. The parallel-in or
bserial-in modes are controlled by the SHIFT/
OLOAD input. When the SHIFT/LOAD input is held
-high, the serial data input is enabled and the eight
)flip-flops perform serial shifting with each clock
t(spulse; when held low, the parallel data inputs are
ORDER CODES
PACKAGE
TUBE
DIP
SOP
TSSOP
M74HC166B1R
M74HC166M1R
T&R
M74HC166RM13TR
M74HC166TTR
enabled and synchronous loading occurs on the
next clock pulse. Clocking is accomplished on the
low-to-high level edge of the clock pulse. The
CLOCK-INHIBIT input should be changed to the
high only while the clock input is held high. A direct
clear input overrides all other inputs, including the
clock, and sets all flip-flops to zero. Functional
details are shown in the truth table and the timing
chart. All inputs are equipped with protection
circuits against static discharge and transient
excess voltage.
Obsolete ProducPIN CONNECTION AND IEC LOGIC SYMBOLS
July 2001
1/12
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Pages | Pages 12 | ||
Télécharger | [ M74HC166 ] |
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