M34A02MN Datasheet PDF - ST Microelectronics
| Part Number | M34A02MN | |
| Description | 2 Kbit Serial SMBus EEPROM for ACR Card Configuration | |
| Manufacturers | ST Microelectronics | |
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M34A02
2 Kbit Serial SMBus EEPROM for ACR Card Configuration
PRODUCT PREVIEW
s Two Wire SMBus Serial Interface
s 2.7V to 3.6V Single Supply Voltage
s Hardware Write Control
s BYTE and PAGE WRITE (up to 16 Bytes)
s RANDOM and SEQUENTIAL READ Modes
s Self-Timed Programming Cycle
s Automatic Address Incrementing
s Enhanced ESD/Latch-Up Behavior
s More than 1 Million Erase/Write Cycles
s More than 40 Year Data Retention
DESCRIPTION
These electrically erasable programmable
memory (EEPROM) devices are organized as
256x8 bits, and operate down to 2.7 V.
These devices are available in Plastic Small
Outline and Thin Shrink Small Outline packages.
These devices are written by the ACR card-issuer,
and then accessed in Read mode in the
application, using the ACR Serial Bus protocol.
This is a two wire serial interface that uses a bi-
directional data bus and serial clock. The device
carries a built-in 4-bit Device Type Identifier code
(1011).
The device behaves as a slave in the ACR Serial
Bus protocol, with all memory operations
synchronized by the serial clock. Read and Write
operations are initiated by a Start condition,
generated by the bus master. The Start condition
Table 1. Signal Names
E0, E1, E2
Chip Enable
SDA
Serial Data
SCL
Serial Clock
WC Write Control
VCC
VSS
Supply Voltage
Ground
8
1
SO8 (MN)
150 mil width
8
1
TSSOP8 (DW)
169 mil width
Figure 1. Logic Diagram
VCC
3
E0-E2
SCL
WC
M34A02
VSS
SDA
AI03794
April 2001
This is preliminary information on a new product now in development. Details are subject to change without notice.
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M34A02
Table 4. Operating Modes
Mode
RW bit
Current Address Read
1
Random Address Read
0
1
Sequential Read
1
Byte Write
0
Page Write
Note: 1. X = VIH or VIL.
0
WC 1
X
X
X
X
VIL
VIL
same as the pattern applied on Chip Enable (E0,
E1, E2).
The 8th bit is the Read/Write bit (RW). This bit is
set to 1 for Read and 0 for Write operations. If a
match occurs on the Device Select code, the
corresponding device gives an acknowledgment
Bytes
1
1
≥1
1
≤ 16
Initial Sequence
START, Device Select, RW = 1
START, Device Select, RW = 0, Address
reSTART, Device Select, RW = 1
Similar to Current or Random Address Read
START, Device Select, RW = 0
START, Device Select, RW = 0
on Serial Data (SDA) during the 9th bit time. If the
device does not match the Device Select code, it
deselects itself from the bus, and goes into Stand-
by mode.
Figure 6. Write Mode Sequences with WC=1 (data write inhibited)
WC
Byte Write
ACK
ACK
NO ACK
DEV SEL
BYTE ADDR
DATA IN
R/W
WC
Page Write
WC (cont'd)
Page Write
(cont'd)
ACK
ACK
NO ACK
NO ACK
DEV SEL
BYTE ADDR DATA IN 1
DATA IN 2
DATA IN 3
R/W
NO ACK
NO ACK
DATA IN N
AI02803C
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Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for M34A02MN electronic component. |
| Information | Total 15 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ M34A02MN.PDF Datasheet ] | |
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