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ST Microelectronics - 256 x 256 DIGITAL SWITCHING MATRIX

Numéro de référence M3488
Description 256 x 256 DIGITAL SWITCHING MATRIX
Fabricant ST Microelectronics 
Logo ST Microelectronics 





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M3488 fiche technique
M3488
256 x 256 DIGITAL SWITCHING MATRIX
. 256 INPUT AND 256 OUTPUT CHANNEL
. CMOS DIGITAL SWITCHING MATRIX COM-
PATIBLE WITH M088
BUILDING BLOCK DESIGNED FOR LARGE
. CAPACITY ELECTRONIC EXCHANGES, SUB-
SYSTEMS AND PABX
NO EXTRA PIN NEEDED FOR NOT-BLOCK-
ING SINGLE STAGE AND HIGHER CAPACITY
SYNTHESIS BLOCKS (512 or 1024 channels)
. EUROPEAN TELEPHONE STANDARD COM-
PATIBLE (32 serial channels per frame)
. PCM INPUTS AND OUTPUTS MUTUALLY
COMPATIBLE
. ACTUAL INPUT-OUTPUT CHANNEL CON-
NECTIONS STORED AND MODIFIED VIA AN
ON CHIP 8-BIT PARALLEL MICROPROCES-
SOR INTERFACE
. TYPICAL BIT RATE : 2Mbit/s
. TYPICAL SYNCHRONIZATION RATE : 8KHz
(time frame is 125µs)
. 5V P0WER SUPPLY
. CMOS & TTL INPUT/OUTPUT LEVELS COM-
PATIBLE
. HIGH DENSITY ADVANCED 1.2µm HCMOS3
PROCESS
PRELIMINARY DATA
DIP40
PQFP44
ORDERING NUMBERS:
M3488B1
M3488Q1
Main instructions controlled by the microproc-
essor interface
. CHANNEL CONNECTION/DISCONNECTION
. OUTPUT CHANNEL DISCONNECTION
. INSERTION OF A BYTE ON A PCM OUTPUT
CHANNEL/DISCONNECTION
. TRANSFER TO THE MICROPROCESSOR OF
A SINGLE PCM OUTPUT CHANNEL SAMPLE
. TRANSFER TO THE MICROPROCESSOR OF
. A SINGLE OUTPUT CHANNEL CONTROL
WORD
TRANSFER TO THE MICROPROCESSOR OF
A SELECTED 0 CHANNEL PCM INPUT DATA
ABSOLUTE MAXIMUM RATINGS
Symbol
VCC
VI
VO
IO
Ptot
Tstg
Top
Parameter
Supply Voltage
Input Voltage
Off State Output Voltage
Current at Digital Outputs
Total Package Power Dissipation
Storage Temperature Range
Operating Temperature Range
Test Conditions
-0.3 to 7
-0.3 to VCC+0.3
-0.3 to VCC+0.3
30
1.5
-65 to 150
0 to 70
Unit
V
V
V
mA
W
°C
°C
Stresses above those l isted under ” Absolute Maximum Ratings” may cause permanent damage to the devi ce. This is a stress
rati ngs only and functional operation of the device at these or any other conditions above those indicated in the operating con-
ditions of this specificati on is not implied. Exposure to absolute maximum rating conditions for extended periods may affect devi ce
reliabili ty.
November 1994
1/18
This is advanced information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

PagesPages 18
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